Paul Lee Stultz from Pflugerville, TX, age 79

Us Patents

System And Method For Interface Isolation And Operating System Notification During Bus Errors
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US Patent:

6904546, Jun 7, 2005
Filed:

Feb 12, 2002
Appl. No.:

10/074204
Inventors:

Wuxian Wu - Round Rock TX, US
Paul Dennis Stultz - Round Rock TX, US
Madhusudhan Rangarajan - Austin TX, US
Assignee:

Dell USA, L.P. - Round Rock TX
International Classification:

G06F011/00
US Classification:

714 44, 714 36
Abstract:

A system and method for notifying an operating system of an error signal transmitted by a communications medium is disclosed. The communications medium connects a plurality of electronic devices. The operating system includes device drivers and is capable of configuring communications between one or more applications and the communications medium. A detector is coupled to the communications medium. The detector receives error signals transmitted by the communications medium, one or more error signals associated with one of the electronic devices. A BIOS is coupled to the detector. The BIOS is capable of determining an electronic device associated with a first error signal. The BIOS generates a hot-eject signal identifying that electronic device in response to the first error signal. The operating system blocks communications between the applications and the identified electronic device in response to the BIOS generating the hot-eject signal.

System And Method For Manufacture Of Information Handling Systems With Selective Option Rom Executions
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US Patent:

7127603, Oct 24, 2006
Filed:

Nov 14, 2003
Appl. No.:

10/713930
Inventors:

Madhusudhan Rangarajan - Round Rock TX, US
Paul D. Stultz - Round Rock TX, US
Assignee:

Dell Products, L.P. - Round Rock TX
International Classification:

G06F 9/24
G06F 9/445
US Classification:

713 2, 713 1
Abstract:

Option ROMs associated with information handling system processing components is selectively disabled to reduce the time associated with one or more boots of the information handling system, such as during deployment of applications after manufacture of the information handling system. An Option ROM selector module identifies one or more Option ROMs to disable at a boot, such as Option ROMs associated with processing components that are not needed for deployment of applications, and communicates the disabled Option ROMs to an Option ROM boot execution controller of the information handling system, such as with SMBIOS tokens. At a subsequent boot, the Option ROM execution controller prevents the BIOS from loading disabled Option ROMs for execution so that boot time is reduced with impact to the deployment of applications.

System And Method For Processing System Management Interrupts In A Multiple Processor System
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US Patent:

7200701, Apr 3, 2007
Filed:

Aug 26, 2004
Appl. No.:

10/926666
Inventors:

Paul D. Stultz - Round Rock TX, US
Assignee:

Dell Products L.P. - Round Rock TX
International Classification:

G06F 13/24
G06F 13/32
US Classification:

710267, 710260
Abstract:

A system and method for processing system management interrupts in multiple processor systems is disclosed. In one embodiment, a method for processing a system management interrupt (SMI) in an information handling system including, for each processor, identifying whether the processor is an interrupt handling processor assigned to perform processing tasks necessary for resolving the SMI or a non-interrupt handling processor not assigned to perform the processing tasks necessary for resolving the SMI. The method further including, for each non-interrupt handling processor, setting the non-interrupt handling processor into a wait for Start-up Inter-Processor Interrupt (SIPI) mode. The method further including, for the interrupt handling processor, performing the processing tasks necessary for resolving the SMI such that upon entry into a SMI handler the interrupt handling processor enters and exits the SMI handler without synchronization with the non-interrupt handling processors.

Chipset-Independent Method For Locally And Remotely Updating And Configuring System Bios
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US Patent:

7500095, Mar 3, 2009
Filed:

Mar 15, 2006
Appl. No.:

11/375766
Inventors:

Samer El Haj Mahmoud - Austin TX, US
Paul Dennis Stultz - Leander TX, US
Assignee:

Dell Products L.P. - Round Rock TX
International Classification:

G06F 9/00
US Classification:

713 2, 713 1, 713100
Abstract:

For updating a basic input output system (BIOS) code stored in a non-volatile memory (NVM) included in an information handling system (IHS), a plurality of conditions permitting the updating of the BIOS stored in the NVM from a memory of the IHS are verified. The contents of the memory are preserved by disabling interrupts and disabling bus masters capable of causing a change in the contents of the memory. The BIOS stored in the NVM is updated from the memory. A user interface is provided to display status of the updating of the NVM to improve user experience. Upon completion of the updating the IHS is reset by enabling a cold reboot, thereby enabling the changes made to the BIOS to take effect.

System And Method For Using A Memory Mapping Function To Map Memory Defects
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US Patent:

7694195, Apr 6, 2010
Filed:

Aug 14, 2007
Appl. No.:

11/838687
Inventors:

Mukund P. Khatri - Austin TX, US
Forrest E. Norrod - Austin TX, US
Jimmy D. Pike - Georgetown TX, US
Michael Sheperd - Pflugerville TX, US
Paul D. Stultz - Cedar Park TX, US
Assignee:

Dell Products L.P. - Round Rock TX
International Classification:

G11C 29/00
US Classification:

714723
Abstract:

A system and method are herein disclosed for managing memory defects in an information handling system. More particularly, a system and method are described for generating a usable memory map which excludes memory locations containing defect memory elements. In an information handling system, a memory defect map, which contains information about the location of defective memory elements, is coupled to the memory device. As a map of memory usable by the system is created, usable memory regions containing defective memory elements are excluded from the memory map. The memory map is passed to the operating system, which uses only those regions of memory designated as usable and non-defective.

System And Method For Exiting From An Interrupt Mode In A Multiple Processor System
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US Patent:

7721024, May 18, 2010
Filed:

Nov 12, 2003
Appl. No.:

10/706657
Inventors:

Paul D. Stultz - Round Rock TX, US
Assignee:

Dell Products L.P. - Round Rock TX
International Classification:

G06F 3/00
US Classification:

710 48, 710 33, 710 47
Abstract:

A system and method for interrupt processing includes a technique for exiting from interrupt mode in multiple processor systems. Those processors that were in a suspended or halt state immediately before entering the interrupt mode are released immediately with reference to the resolution of the interrupt condition. Those processors not responsible for the processing tasks associated with resolving the interrupt condition serially exit from interrupt mode on a time-delayed basis following the resolution of the interrupt condition.

System And Method For Managing Memory Errors In An Information Handling System
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US Patent:

7945815, May 17, 2011
Filed:

Aug 14, 2007
Appl. No.:

11/838602
Inventors:

Mukund P. Khatri - Austin TX, US
Paul D. Stultz - Cedar Park TX, US
Forrest E. Norrod - Austin TX, US
Jimmy D. Pike - Georgetown TX, US
Assignee:

Dell Products L.P. - Round Rock TX
International Classification:

G06F 11/00
US Classification:

714 42, 714 36
Abstract:

A method for handling memory defects during the POST phase and memory calibration in single processor and multiprocessor information handling systems is disclosed whereby information regarding the location of a known memory defect is utilized to optimize the performance of an information handling system. Memory defects within system memory are identified and replaced during operation with error free memory space.

System And Method For Using A Memory Mapping Function To Map Memory Defects
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US Patent:

8276029, Sep 25, 2012
Filed:

Apr 2, 2010
Appl. No.:

12/753406
Inventors:

Mukund P. Khatri - Austin TX, US
Forrest E. Norrod - Austin TX, US
Jimmy D. Pike - Georgetown TX, US
Michael Shepherd - Pflugerville TX, US
Paul D. Stultz - Cedar Park TX, US
Assignee:

Dell Products L.P. - Round Rock TX
International Classification:

G11C 29/00
US Classification:

714723
Abstract:

A system and method are herein disclosed for managing memory defects in an information handling system. More particularly, a system and method are described for generating a usable memory map which excludes memory locations containing defect memory elements. In an information handling system, a memory defect map, which contains information about the location of defective memory elements, is coupled to the memory device. As a map of memory usable by the system is created, usable memory regions containing defective memory elements are excluded from the memory map. The memory map is passed to the operating system, which uses only those regions of memory designated as usable and non-defective.