Peng Wen L Zhang

US Patent:

8227395, Jul 24, 2012

Filed:

Jul 29, 2010

Appl. No.:

12/846369

Inventors:

Peng Zhang - Hillsdale NJ, US
Danielle Megan King Curzi - San Francisco CA, US
Leslie Cox Barber - Cave Creek AZ, US

Assignee:

Air Products and Chemicals, Inc. - Allentown PA

International Classification:

C11D 1/00

US Classification:

510175, 510176, 134 13

Abstract:

Process solutions comprising one or more surfactants are used to reduce the number of defects in the manufacture of semiconductor devices. In certain preferred embodiments, the process solution of the present invention may reduce post-development defects such as pattern collapse when employed as a rinse solution either during or after the development of the patterned photoresist layer. Also disclosed is a method for reducing the number of pattern collapse defects on a plurality of photoresist coated substrates employing the process solution of the present invention.

US Patent:

8551944, Oct 8, 2013

Filed:

Apr 15, 2011

Appl. No.:

13/640720

Inventors:

Zhaodan Cao - San Antonio TX, US
Yarong Lu - Watertown MA, US
Daniel David Kaplan - San Mateo CA, US
Peng Zhang - Fremont CA, US

Assignee:

NGM Biopharmaceuticals, Inc. - South San Francisco CA

International Classification:

A61P 5/50
A61P 3/10

US Classification:

514 67, 514 68, 514 69

Abstract:

Methods of treating individuals with a glucose metabolism disorder, and compositions thereof, are provided.

US Patent:

20120315274, Dec 13, 2012

Filed:

Jan 7, 2011

Appl. No.:

13/519557

Inventors:

Zhaodan Cao - San Antonio TX, US
Yarong Lu - Watertown MA, US
Peng Zhang - Fremont CA, US
Daniel David Kaplan - San Mateo CA, US

International Classification:

A61K 38/17
A61P 3/10
A61K 39/395
A61P 3/00

US Classification:

4241341, 514 68, 514 69

Abstract:

Methods of treating individuals with a glucose metabolism disorder such as diabetes, hyperglycemia, hyperinsulinemia or obesity by administering human FAM3D (family with sequence similarity 3, member D) are provided. Specifically a method of treating hyperglycemia resulting in a reduction of plasma glucose is provided. Additionally, a method of treating hyperinsulinemia resulting in a reduction of plasma glucose is provided. In addition, a method of treating glucose intolerance resulting in an increased glucose tolerance is provided. Pharmaceutical compositions are provided.

US Patent:

20230095074, Mar 30, 2023

Filed:

Oct 31, 2022

Appl. No.:

17/977619

Inventors:

- Paris, FR
- Fremont CA, US
Peng ZHANG - Montvale NJ, US
Fan QIN - Bear DE, US
Gennadiy ITOV - Flemington NJ, US
Fabrizio MARCHEGIANI - Wilmington DE, US
Thomas J. LARRABEE - Middletown DE, US
Venkateswara R. PALLEM - Hockessin DE, US

International Classification:

C09D 183/14

Abstract:

A method of forming a gap filling on a substrate, the substrate having gaps formed therein, comprises: producing a gap filling polycarbosilazane polymer or oligomer by a polymerization of a reaction mixture of carbosilanes with amines; forming a solution containing the gap filling polycarbosilazane polymer or oligomer; and contacting the solution with the substrate via a spin-on coating, spray coating, dip coating, or slit coating technique to fill the gaps in the substrate forming the silicon and carbon containing gap filling, wherein a concentration of the gap filling polycarbosilazane polymer or oligomer in the solution ranges from 1 to 60 wt %.

US Patent:

20230099107, Mar 30, 2023

Filed:

Sep 27, 2021

Appl. No.:

17/485949

Inventors:

- Addison TX, US
Peng ZHANG - San Jose CA, US

International Classification:

H01L 27/11551
H01L 27/11578
H01L 27/11529
H01L 27/11573

Abstract:

A three-dimensional memory device includes a first alternating stack of first insulating layers and first electrically conductive layers located over a semiconductor material layer, an inter-tier dielectric layer, and a second alternating stack of second insulating layers and second electrically conductive layers located over the inter-tier dielectric layer. A memory opening vertically extends through the second alternating stack, the inter-tier dielectric layer, and the first alternating stack. A memory opening fill structure is located in the memory opening, and includes a first vertical semiconductor channel, a second vertical semiconductor channel, and an inter-tier doped region located between the first and the second semiconductor channel, and providing a first p-n junction with the first vertical semiconductor channel and providing a second p-n junction with the second vertical semiconductor channel.

US Patent:

20210408024, Dec 30, 2021

Filed:

Jun 30, 2020

Appl. No.:

16/916186

Inventors:

- Addison TX, US
Yanli Zhang - San Jose CA, US
Peng Zhang - San Jose CA, US

Assignee:

SanDisk Technologies LLC - Addison TX

International Classification:

H01L 27/11556
G11C 5/02
G11C 5/06
H01L 29/06
H01L 27/11582

Abstract:

A memory device disclosed herein. The memory device comprises: a memory string including a first select transistor, a memory cell transistor, and a second select transistor connected in series; a bit line connected to one end of the first select transistor; a source line connected to one end of the second select transistor; a first select line connected to a gate of the first select transistor; a word line connected to a gate of the memory cell transistor; a second select line connected to a gate of the second select transistor; and a control circuit configured to perform, before a program operation, a pre-charge operation comprising: applying a voltage to the second select line connected to the gate of the second select transistor to cause gate-induced drain leakage from the second select transistor.

US Patent:

20210395890, Dec 23, 2021

Filed:

Aug 23, 2021

Appl. No.:

17/409229

Inventors:

- Paris, FR
Peng ZHANG - Montvale NJ, US
Antonio SANCHEZ - Tsukuba, JP
Manish KHANDELWAL - Somerset NJ, US
Gennadiy ITOV - Flemington NJ, US
Reno PESARESI - , US
Grigory NIKIFOROV - Easton PA, US
David ORBAN - Hampton NJ, US

International Classification:

C23C 16/455
H01L 21/02
C01B 21/088
C23C 16/515
C23C 16/40
C23C 16/34
C23C 16/30
C01B 21/087
C07F 7/02

Abstract:

Methods for producing halosilazane comprise halogenating a hydrosilazane with a halogenating agent to produce the halosilazane, the halosilazane having a formulawherein each a, b, c is independently 0 to 3; a+b+c=3; d is 0 to 2 and n≥1; wherein X is selected from a halogen atom selected from F, Cl, Br or I; each R is selected from H, a C-Clinear or branched, saturated or unsaturated hydrocarbyl group, or a silyl group [SiR′]; further wherein each R′ of the [SiR′] is independently selected from H, a halogen atom selected from F, Cl, Br or I, a C-Csaturated or unsaturated hydrocarbyl group, a C-Csaturated or unsaturated alkoxy group, or an amino group [—NRR] with each Rand Rbeing further selected from H or a C-Clinear or branched, saturated or unsaturated hydrocarbyl group, provided that when c=0, d≠0; or d=0, c≠0.

US Patent:

20210225635, Jul 22, 2021

Filed:

Mar 10, 2021

Appl. No.:

17/197895

Inventors:

- Paris, FR
Peng ZHANG - Montvale NJ, US
Antonio SANCHEZ - Tsukuba, JP
Manish KHANDELWAL - Somerset NJ, US
Gennadiy ITOV - Flemington NJ, US
Reno PESARESI - Easton NJ, US

International Classification:

H01L 21/02
C07F 7/02
C01B 21/087
C01B 21/088
C23C 16/30
C23C 16/34
C23C 16/40
C23C 16/455
C23C 16/515

Abstract:

Methods are disclosed for forming a Silicon Metal Oxide film using a mono-substituted TSA precursor. The precursors have the formula: (SiH3)2N—SiH2-X, wherein X is selected from a halogen atom; an isocyanato group; an amino group; an N-containing C4-C10 saturated or unsaturated heterocycle; or an alkoxy group.