Phillip W Johnson

US Patent:

7586344, Sep 8, 2009

Filed:

Oct 16, 2007

Appl. No.:

11/872950

Inventors:

Richard Booth - Hillsboro OR, US
Phillip Johnson - Hillsboro OR, US
Zheng Chen - Hillsboro OR, US

Assignee:

Lattice Semiconductor Corporation - Hillsboro OR

International Classification:

H03B 19/00

US Classification:

327117, 327121, 377 48

Abstract:

In one embodiment, the invention can be a clock-generating circuit having one or more clock-processing circuits, each outputting a clock signal having an adjustable phase. Each clock-processing circuit comprises a divider and a divisor control circuit. Each divider divides an input clock signal by a respective divisor value and outputs a corresponding output clock signal whose period is determined by the divisor value and the period of the input clock signal. Each divider receives the respective divisor value from the corresponding divisor control circuit, wherein the divisor value is selected in order to achieve a desired frequency and phase for the corresponding output clock signal. Temporarily changing a divisor value can advance or delay the phase of the corresponding output clock signal without having to reset the divider.

Address:

22555 10 Ave S, Des Moines, WA 98198

VIN:

1A4GJ45R27B186403

Make:

CHRYSLER

Model:

TOWN AND COUNTRY

Year:

2007