Phuc T Tran

US Patent:

8332931, Dec 11, 2012

Filed:

Sep 1, 2009

Appl. No.:

12/551758

Inventors:

Phuc Thanh Tran - Fremont CA, US
Bing Xiao - San Jose CA, US
Tze Lei Poo - Sunnyvale CA, US
Peter Nhat Dinh - San Jose CA, US

Assignee:

Marvell International Ltd.

International Classification:

G06F 7/04
G06F 12/14

US Classification:

726 17

Abstract:

Devices, systems, methods, and other embodiments associated with processing commands according to authorization are described. In one embodiment, a chip includes a secure module configured to store secure firmware, and to execute the secure firmware. The secure firmware prevents the secure module from at least partially processing a command that originated from an untrusted source. The chip also includes an unsecure module configured to store unsecure firmware, and to execute the unsecure firmware. The unsecure firmware permits the unsecure module to process a command having originated from an untrusted source. The chip is configured where the unsecure firmware is separately updateable from the secure firmware.

US Patent:

8423789, Apr 16, 2013

Filed:

May 22, 2008

Appl. No.:

12/125670

Inventors:

Tze Lei Poo - Sunnyvale CA, US
Gregory Burd - San Jose CA, US
Phuc Thanh Tran - Fremont CA, US
Saeed Azimi - Los Gatos CA, US

Assignee:

Marvell International Ltd. - Hamilton

International Classification:

G06F 21/00

US Classification:

713189, 713193, 380 44

Abstract:

In one or more embodiments, an integrated circuit includes a programmable memory, a key generation module and a module. The programmable memory is to maintain a first key portion. The key generation module is to generate a key using the first key portion from the programmable memory and a second key portion received via a memory interface. The module is to encrypt or decrypt data using the key.

US Patent:

62498967, Jun 19, 2001

Filed:

Feb 17, 1999

Appl. No.:

9/251724

Inventors:

Son Hong Ho - Los Altos CA
Hung Cao Nguyen - San Jose CA
Phuc Thanh Tran - Milpitas CA

Assignee:

LSI Logic Corporation - Milpitas CA

International Classification:

G11B 2700
G06F 1100

US Classification:

714814

Abstract:

Synchronization (sync) marks on a digital-versatile disk (DVD) optical disk are initially detected and later used to adjust bit timing after jitter has occurred. Each DVD physical sector contains many sync marks in a predefined sequence. Each sync mark has a sync-code field that varies for the sync marks in a sector, and a fixed sync pattern that is constant for all sync marks. The first sync mark is detected at initialization by detecting a previous sequence of sync codes of sync marks that precede the first sync mark. The sequence is programmable so that one to seven sync marks are in the sequence searched for. Detection for sync marks with bit errors can still occur since a programmable number of bit errors are allowed in each sync code and in the fixed sync pattern. One of the sync codes can be missed in the sequence and detection still made, allowing tolerance of errors in the sync marks when longer sequences of sync codes are matched. Once initial sync is made, the bit timing is adjusted when too many pseudo-sync clocks are inserted for sync marks missed due to jitter.

US Patent:

55026966, Mar 26, 1996

Filed:

Sep 23, 1994

Appl. No.:

8/311069

Inventors:

Tony J. Yoon - San Jose CA
Michael J. McGrath - Sunnyvale CA
Phuc Tran - Milpitas CA

Assignee:

Cirrus Logic, Inc. - Fremont CA

International Classification:

G11B 1722

US Classification:

369 32

Abstract:

A subcode R-W channel data de-interleaving and de-scrambling method and apparatus includes the ability to de-interleave and de-scramble the encoded subchannel data without the necessity of storage elements, by dynamically calculating the final location of each byte of data within a packet as it is read from the CD-Rom. A pack counter monitors the pack number of the current byte of data. An index counter monitors the location of the current data within a pack. A subtractor uses the values from the pack counter and the index counter to obtain an input value, a first portion of which is supplied to a first offset generator. A second portion of the subtractor output is used to select a base address. The first offset generator determines the pack number of the current byte of data after the de-interleave process. A second offset generator receives a value from the index counter and generates a corresponding value.