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Piyapong Thanyasrisung

age ~52

from Northridge, CA

Also known as:
  • Piyapong G
Phone and address:
10953 Canby Ave, Northridge, CA 91326

Piyapong Thanyasrisung Phones & Addresses

  • 10953 Canby Ave, Northridge, CA 91326
  • Fountain Valley, CA
  • 9 Santa Luzia Aisle, Irvine, CA 92606
  • Newport Coast, CA

Us Patents

  • Self-Synchronizing Adaptive Multistage Receiver For Wireless Communication Systems

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  • US Patent:
    20020136277, Sep 26, 2002
  • Filed:
    Jun 18, 2001
  • Appl. No.:
    09/883835
  • Inventors:
    Irving Reed - Santa Monica CA, US
    Piyapong Thanyasrisung - Northridge CA, US
    J. Goldstein - Centreville VA, US
    T. Truong - San Marino CA, US
  • International Classification:
    H04K001/00
  • US Classification:
    375/148000, 375/149000
  • Abstract:
    The present invention discloses an adaptive near-far resistant receiver for wireless communication systems, such as, asynchronous DS-CDMA systems, without the use of prior synchronization. The only requirement is knowledge of the spreading code of the desired user. Also there is no need of a training period or of data-free observations. In one aspect the present system describes a method and system for filtering of an asynchronous wireless signal comprising the steps of receiving a data vector; of using the received data vector to update the weight coefficients of an adaptive filter without a prior knowledge of synchronization and without a need for a separate training period or data free observations. In another aspect, the present system describes an adaptive near-far resistant receiver for an asynchronous wireless systems comprising means for receiving a data vector; means for; using the received data vector to update weight coefficients of an adaptive filter, and means for iterative multistage decomposition updating of the filter coefficients. In one embodiment the receiver uses an adaptive filter bank comprising a plurality of adaptive filters, wherein each filter corresponds to at least one different sampling time. An estimate of the timing is obtained from the maximum of a set of sequential outputs from the filter bank, The output that yields the maximum is preferably used to demodulate the information bit.

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