Qian H Wang

US Patent:

7000141, Feb 14, 2006

Filed:

Nov 14, 2001

Appl. No.:

10/295554

Inventors:

Magnus Karlsson - Mountain View CA, US
Qian Wang - State College PA, US
John Wilkes - Palo Alto CA, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06F 11/00

US Classification:

714 4, 709201

Abstract:

A technique for data placement in a distributed system that takes into account fault tolerance. Data placement is performed in which data objects, and possibly replicas thereof, are assigned to nodes within the distributed system. The resulting placement is then tested to determine whether the system provides desired performance under various different fault scenarios. If not, the distributed system is altered such as by altering its capacity or its capacity allocations. Performing data placement, testing for fault-tolerance and altering capacity or capacity allocations are performed repetitively, thereby increasing the system's ability to provide the desired performance under the fault scenarios. Preferably, a system and placement are eventually determined that provide the desired performance under the given fault scenarios.

US Patent:

20070045756, Mar 1, 2007

Filed:

Jul 18, 2006

Appl. No.:

11/488465

Inventors:

Jean-Christophe Gabriel - Pinole CA, US
Alexander Star - Pittsburgh PA, US
Christian Valcke - Orinda CA, US
Qian Wang - Mountain View CA, US

International Classification:

H01L 29/82

US Classification:

257414000

Abstract:

A nanoelectronic sensing device includes a substrate, a nanostructure element disposed adjacent the substrate, and at least a conductive element electrically connected to the nanostructure element. The device is configured to heat at least a portion of the sensor structure including the nanostructure element. In certain embodiments, the nanostructure element comprises at least one nanotube, the nanotube being electrically connected to at least two conductors so as to permit an electric current on the order of 10 microAmps or greater to be passed through the nanotube, causing the nanotube to heat up relative to the substrate. In alternative embodiments, the sensing device includes a platform or membrane which is at least partially thermally isolated by one or more cavities, the platform supporting at least the nanostructure element adjacent to a microheater element. The heating of the sensor structure may be employed, for example, for thermoregulation, to accelerate and/or increase sensor response, and to improve other sensor characteristics.

US Patent:

20140066469, Mar 6, 2014

Filed:

Aug 21, 2013

Appl. No.:

13/972614

Inventors:

Qian Wang - Palo Alto CA, US
Heidi H. Wong - San Francisco CA, US
Mark C. Genovese - Sunnyvale CA, US

International Classification:

A61K 31/4706
A61K 45/06
A61K 31/40

US Classification:

514275, 514313

Abstract:

Compositions and methods are provided for preventing or treating the pre-clinical early-stages of inflammatory diseases, including autoimmune diseases, degenerative inflammatory diseases, metabolic inflammatory diseases, chronic infection associated with inflammation, cancer associated with inflammation, and other inflammatory diseases by administration to an individual of an effective dose of a synergistic combination of active agents comprising or consisting essentially of an aminoquinoline, e.g. hydroxychloroquine, and a statin, e.g. atorvastatin. Each or both of the active agents can be formulated in various ways, including without limitation a solid oral dosage form.

US Patent:

20220301891, Sep 22, 2022

Filed:

Mar 22, 2021

Appl. No.:

17/208322

Inventors:

- Palo Alto CA, US
Qian Wang - Mountain View CA, US
Eugene M. Chow - Palo Alto CA, US

International Classification:

H01L 21/56
H01L 23/532
H01L 23/31
H01L 23/29

Abstract:

A release layer is formed on a surface of an integrated circuit wafer. The surface is passivated and includes metal contact materials. A stress-engineered film having an intrinsic stress profile is deposited over the release layer. The stress-engineered film is patterned and the release layer is undercut etched so that a released portion of the patterned stress-engineered film is released from the surface while leaving an anchor portion fixed to the surface. The intrinsic stress profile in the stress-engineered film biases the released portion away from the surface. The released portion is placed entirely within an area defined by the metal contact material.

US Patent:

20220301996, Sep 22, 2022

Filed:

Mar 22, 2021

Appl. No.:

17/208332

Inventors:

- Palo Alto CA, US
Qian Wang - Mountain View CA, US
Yu Wang - Union City CA, US
Eugene M. Chow - Palo Alto CA, US

International Classification:

H01L 23/498
H01L 23/31
H01L 23/00

Abstract:

An electronic assembly and methods of making the assembly are disclosed. The electronic assembly includes a substrate with an elastic member having an intrinsic stress profile. The elastic member has an anchor portion on the surface of the substrate; and a free end biased away from the substrate via the intrinsic stress profile to form an out of plane structure. The substrate includes one or more spacers on the substrate. The electronic assembly includes a chip comprising contact pads. The out of plane structure on the substrate touches corresponding contact pads on the chip, and the spacers on the substrate touch the chip forming a gap between the substrate and the chip.

US Patent:

20220247014, Aug 4, 2022

Filed:

Apr 30, 2021

Appl. No.:

17/246431

Inventors:

- Vernon CA, US
Qian Wang - Los Angeles CA, US
Berton Vite - Huntington Beaach CA, US
W. Hunter Greene - Los Angeles CA, US

Assignee:

Romeo Systems Technology, LLC - Vernon CA

International Classification:

H01M 10/6569
H01M 10/613
H01M 10/6554

Abstract:

Thermal management systems for batteries utilize vapor chambers having wicking components therein. An exemplary thermal management system includes a vapor chamber containing a working fluid and wicking components. A plurality of battery cells are disposed at least partially in the vapor chamber. A cold plate is coupled to the vapor chamber, and a heat pump is coupled to the cold plate. A capillary tube may be utilized to facilitate movement of vapor and working fluid in the thermal management system. Via use of exemplary systems, improved thermal management for batteries is provided.

US Patent:

20230054034, Feb 23, 2023

Filed:

Aug 23, 2021

Appl. No.:

17/408708

Inventors:

- Palo Alto CA, US
Joerg Martini - San Francisco CA, US
Mark Teepe - Palo Alto CA, US
Yu Wang - San Jose CA, US
Qian Wang - Mountain View CA, US

International Classification:

H01S 5/42
H01S 5/024
H01S 5/02326
H01S 5/042
H01S 5/02315
H01S 5/02345
B41J 3/407

Abstract:

A 3D package for semiconductor thermal management can include a 3D submount forming a mechanical block including at least one embedded channel formed within the mechanical block and configured to accept cooling liquid therethrough, a first tubular connection for providing cooling liquid to the at least one embedded channel, and a second tubular connection for removing cooling liquid from the at least one embedded channel. Integrated slots can be provided for accepting and mounting semiconductor components. Mounting holes can be formed in the mechanical block for securing optical elements. At least one semiconductor laser array die can be secured to the mechanical block at the integrated slots, wherein the at least one semiconductor laser array die is kept cool by the cooling liquid flowing through the at least one embedded channel.

US Patent:

20210272935, Sep 2, 2021

Filed:

Mar 2, 2020

Appl. No.:

16/805911

Inventors:

- Palo Alto CA, US
Jengping Lu - Fremont CA, US
Qian Wang - Mountain View CA, US
Sourobh Raychaudhuri - Mountain View CA, US

International Classification:

H01L 25/075
H01L 25/16
H01L 33/00
H01L 21/66

Abstract:

MicroLED chips are transferred from an epitaxy wafer to a first coupon substrate. The first coupon substrate has a first, soft adhesive layer that temporarily holds the microLED chips. Using a first transfer substrate, a subset of the microLED chips are transferred from the first coupon substrate to a second coupon substrate having a second, soft adhesive layer. A pattern of microLED chips are transferred from another substrate to the second coupon substrate via a second transfer substrate to fill vacancies in the subset of microLED chips. The transfer substrates are operable to hold and release pluralities of micro objects.