Qian Q Wang

US Patent:

20220350888, Nov 3, 2022

Filed:

Jul 19, 2022

Appl. No.:

17/867780

Inventors:

- Santa Clara CA, US
Marcio Juliato - Portland OR, US
Shabbir Ahmed - Beaverton OR, US
Qian Wang - Portland OR, US
Manoj Sastry - Portland OR, US
Liuyang L. Yang - Portland OR, US
Xiruo Liu - Portland OR, US

Assignee:

INTEL CORPORATION - Santa Clara CA

International Classification:

G06F 21/56

Abstract:

Logic may implement observation layer intrusion detection systems (IDSs) to combine observations by intrusion detectors and/or other intrusion detection systems. Logic may monitor one or more control units at one or more observation layers of an in-vehicle network, each of the one or more control units to perform a vehicle function. Logic may combine observations of the one or more control units at the one or more observation layers. Logic may determine, based on a combination of the observations, that one or more of the observations represent an intrusion. Logic may determine, based at least on the observations, characteristics of an attack, and to pass the characteristics of the attack information to a forensic logging system to log the attack or pass the characteristics of the attack to a recovery system for informed selection of recovery procedures. Logic may dynamically adjust a threshold for detection of suspicious activity.

US Patent:

20220277077, Sep 1, 2022

Filed:

May 12, 2022

Appl. No.:

17/742865

Inventors:

- Santa Clara CA, US
Manoj Sastry - Portland OR, US
Shabbir Ahmed - Beaverton OR, US
Christopher Gutierrez - Hillsboro OR, US
Qian Wang - Portland OR, US
Vuk Lesi - Cornelius OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 21/55
G06F 21/85
G06F 21/71

Abstract:

A platform comprising numerous reconfigurable circuit components arranged to operate as primary and redundant circuits is provided. The platform further comprises security circuitry arranged to monitor the primary circuit for anomalies and reconfigurable circuit arranged to disconnect the primary circuit from a bus responsive to detection of an anomaly. Furthermore, the present disclosure provides for the quarantine, refurbishment and designation as redundant, the anomalous circuit.

US Patent:

20220240168, Jul 28, 2022

Filed:

Sep 23, 2021

Appl. No.:

17/483528

Inventors:

- Santa Clara CA, US
Rath Vannithamby - Portland OR, US
Markus Dominik Mueck - Unterhaching, DE
Leonardo Gomes Baltar - Muenchen, DE
Marcio Rogerio Juliato - Portland OR, US
Liuyang Lily Yang - Portland OR, US
Manoj R. Sastry - Portland OR, US
Shabbir Ahmed - Beaverton OR, US
Christopher Gutierrez - Hillsboro OR, US
Vuk Lesi - Cornelius OR, US
Qian Wang - Santa Clara CA, US

International Classification:

H04W 48/16
H04W 48/14
H04W 4/40
H04W 72/04
H04W 8/24

Abstract:

A computing node to implement a management entity in a CP-based network. The node including processing circuitry configured to encode an inquiry message requesting information on CPS capabilities. Response messages are received from a set of sensing nodes of a plurality of sensing nodes in response to the inquiry message. The response messages include the information on the CPS capabilities of the set of sensing nodes. A notification message indicating selecting of a sensing node as a sensing coordinator is encoded for transmission. Sensed data received in a broadcast message from the sensing coordinator is decoded. The sensed data including data associated with one or more non-V2X capable sensing nodes.

US Patent:

20220224501, Jul 14, 2022

Filed:

Mar 29, 2022

Appl. No.:

17/706939

Inventors:

- Santa Clara CA, US
Christopher Gutierrez - Hillsboro OR, US
Manoj Sastry - Portland OR, US
Christopher Hall - Portland OR, US
Marcio Juliato - Portland OR, US
Shabbir Ahmed - Beaverton OR, US
Qian Wang - PORTLAND OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H04L 7/00

Abstract:

Time recovery techniques are described. A method comprises receiving messages from the first device by the second device in the first network domain, the messages to comprise time information to synchronize a first clock for the first device and a second clock for the second device to a network time, determining the second clock is to recover the network time for the second device without new messages from the first device, retrieving a first set of timestamps previously stored for events in the first network domain using the network time from the second clock, retrieving a second set of timestamps previously stored for the events in the first network domain using a redundant time from a third clock, where the third clock is not synchronized with the first and second clocks, and recovering the network time using a regression model and the redundant time from the third clock.

US Patent:

20220224701, Jul 14, 2022

Filed:

Mar 29, 2022

Appl. No.:

17/706955

Inventors:

- Santa Clara CA, US
Vuk Lesi - Cornelius OR, US
Manoj Sastry - Portland OR, US
Christopher Hall - Portland OR, US
Marcio Juliato - Portland OR, US
Shabbir Ahmed - Beaverton OR, US
Qian Wang - PORTLAND OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H04L 9/40
H04J 3/06

Abstract:

Techniques to secure a time sensitive network are described. An apparatus may establish a data stream between a first device and a second device in a network domain, the network domain includes a plurality of switching nodes, receive messages from the first device by the second device in the network domain, the messages to comprise time information to synchronize a first clock for the first device and a second clock for the second device to a network time for the network domain, update a correction field for a received message with a residence time and time delay value by the second device, determine whether the updated message is benign or malicious, update the correction field for the updated message with an inference time when the updated message is benign, and prevent relay of the updated message to other devices in the network domain when the updated message is malicious.

US Patent:

20210326437, Oct 21, 2021

Filed:

Jun 24, 2021

Appl. No.:

17/357885

Inventors:

- Santa Clara CA, US
Shabbir Ahmed - Beaverton OR, US
Christopher Gutierrez - Hillsboro OR, US
Vuk Lesi - Cornelius OR, US
Manoj Sastry - Portland OR, US
Qian Wang - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 21/55

Abstract:

Systems, apparatuses, and methods to response to detected attacks in an autonomous system based on context of the autonomous system are described. In particular, the disclosure provides an intrusion detection system receiving contexts and contracts dictating particular response guide rails from a higher level components or stack on the autonomous system. The intrusion detection system is arranged to respond to attacks according to the contract without intervention by the higher level components or stack.

US Patent:

20210318414, Oct 14, 2021

Filed:

Jun 24, 2021

Appl. No.:

17/357291

Inventors:

- Santa Clara CA, US
Shabbir Ahmed - Beaverton OR, US
Christopher Gutierrez - Hillsboro OR, US
Wen-Ling Huang - Los Altos CA, US
Marcio Juliato - Portland OR, US
Saiveena Kesaraju - Mountain View CA, US
Manoj Sastry - Portland OR, US
Ivan Simoes Gaspar - West Linn OR, US
Qian Wang - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G01S 7/41
G01S 13/56
G01S 13/931

Abstract:

Systems, apparatuses, and methods to response to distinguish a ghost target from an actual target based on radar signals and ranges determined from the radar signals. In particular, the disclosure provides an intrusion detection system receiving ranges and velocities for targets detected based on radar signals, determining a potential ghost target from the received velocities and confirming the potential ghost target based on estimated ranges and perturbations of the vehicle speed.

US Patent:

20210320933, Oct 14, 2021

Filed:

Jun 23, 2021

Appl. No.:

17/356033

Inventors:

- Santa Clara CA, US
Shabbir Ahmed - Beaverton OR, US
Christopher Gutierrez - Hillsboro OR, US
Vuk Lesi - Cornelius OR, US
Manoj Sastry - Portland OR, US
Qian Wang - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H04L 29/06
H04L 12/40
H04L 12/66

Abstract:

Systems, apparatuses, and methods to identify bus-off and masquerade attacks against ECUs transmitting on a communication bus from behind a gateway coupled to the communication bus. The disclosure further describes systems, apparatuses, and methods to mitigate against bus-off attacks made against an ECU coupled to a communication bus through a gateway.