Rajesh Kanakath Kanakath

US Patent:

20080162062, Jul 3, 2008

Filed:

Dec 28, 2006

Appl. No.:

11/648488

Inventors:

Mukul Kelkar - West Sacramento CA, US
Andrew M. Volk - Granite Bay CA, US
Rajesh Kanakath - Folsom CA, US
Vui Y. Liew - Penang, MY

International Classification:

G01R 29/02
G01F 15/06

US Classification:

702 79, 377 19

Abstract:

In some embodiments, a chip includes clock generation circuitry to create a clock signal, and reference signal oscillator circuitry to produce a reference signal with a higher frequency than the clock signal. The chip includes a counter to change a count value in response to changes in the reference signal; and count logic circuitry to cause count storage circuitry to read the count value in response to at least some changes in the clock signal and to make at least some of the values in the count storage circuitry related to a duty cycle of the clock signal available to an external tester. Other embodiments are described and claimed.