Raul A Diaz

US Patent:

6427194, Jul 30, 2002

Filed:

Mar 30, 2000

Appl. No.:

09/539729

Inventors:

Jefferson Eugene Owen - Freemont CA
Raul Zegers Diaz - Palo Alto CA
Osvaldo Colavin - Tucker GA

Assignee:

STMicroelectronics, Inc. - Carrollton TX
STMircroelectronics, S.r.l. - Agrate, Brianza

International Classification:

G06F 1314

US Classification:

711151, 710 68, 710 22, 345511, 711147

Abstract:

An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard.

US Patent:

7321368, Jan 22, 2008

Filed:

Jun 19, 2002

Appl. No.:

10/174918

Inventors:

Jefferson Eugene Owen - Freemont CA, US
Raul Zegers Diaz - Palo Alto CA, US
Osvaldo Colavin - Tucker GA, US

Assignee:

STMicroelectronics, Inc. - Carrollton TX

International Classification:

G06F 15/167
G09G 5/36
G09G 5/39

US Classification:

345541, 345542, 345531, 345547

Abstract:

An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard.

US Patent:

7542045, Jun 2, 2009

Filed:

Dec 13, 2007

Appl. No.:

11/956165

Inventors:

Jefferson Eugene Owen - Freemont CA, US
Raul Zegers Diaz - Palo Alto CA, US
Osvaldo Colavin - Tucker GA, US

Assignee:

STMicroelectronics, Inc. - Carrollton TX

International Classification:

G06F 15/167
G09G 5/39
G09G 5/36

US Classification:

345541, 345542, 345531, 345547

Abstract:

An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard.

US Patent:

7777753, Aug 17, 2010

Filed:

Apr 15, 2009

Appl. No.:

12/424389

Inventors:

Jefferson Eugene Owen - Freemont CA, US
Raul Zegers Diaz - Palo Alto CA, US
Osvaldo Colavin - Tucker GA, US

Assignee:

STMicroelectronics, Inc. - Carrollton TX

International Classification:

G06F 15/167
G09G 5/36
G09G 5/39

US Classification:

345541, 345542, 345531, 345547

Abstract:

An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard.

US Patent:

7898548, Mar 1, 2011

Filed:

Aug 16, 2010

Appl. No.:

12/857455

Inventors:

Jefferson Eugene Owen - Freemont CA, US
Raul Zegers Diaz - Palo Alto CA, US
Osvaldo Colavin - Tucker GA, US

Assignee:

STMicroelectronics, Inc. - Coppell TX

International Classification:

G06F 15/167
G09G 5/36
G06T 9/00

US Classification:

345541, 345542, 345547, 345555

Abstract:

An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard.

US Patent:

8054315, Nov 8, 2011

Filed:

Jan 27, 2011

Appl. No.:

13/015385

Inventors:

Jefferson Eugene Owen - Fremont CA, US
Raul Zegers Diaz - Palo Alto CA, US
Osvaldo Colavin - Tucker GA, US

Assignee:

STMicroelectronics, Inc. - Coppell TX

International Classification:

G06F 13/18
G06F 15/167
G09G 5/36
G06T 9/00

US Classification:

345541, 345535, 345542, 345547, 345555

Abstract:

An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard.

US Patent:

8238243, Aug 7, 2012

Filed:

Feb 12, 2009

Appl. No.:

12/370328

Inventors:

Raul Diaz - Palo Alto CA, US
Ron Mayer - Newark CA, US

Assignee:

ArcSoft, Inc. - Fremont CA

International Classification:

H04L 12/26

US Classification:

370232, 370235, 370428, 709224, 709225, 709234

Abstract:

As more internet service providers have more customers with high-speed internet access accounts and these customers access more multi-media rich data (such as videos), the network infrastructure of internet service providers becomes saturated. Thus, internet service providers are facing pressure to upgrade their networks. However, high-speed digital networking equipment is expensive. Thus, internet service providers need to optimize the usage of their existing networks. To optimize the usage of existing networks, a system of delaying certain data requests is proposed. By delaying certain data requests, the various components in a network can shift data transfers from peak traffic times to lower traffic times. One useful application of delayed requests is the case in which a web client requests data ahead of schedule either through predictive methods or through subscriptions for desired data.

US Patent:

8314808, Nov 20, 2012

Filed:

Sep 21, 2011

Appl. No.:

13/239200

Inventors:

Jefferson Eugene Owen - Fremont CA, US
Raul Zegers Diaz - Palo Alto CA, US
Osvaldo Colavin - Tucker GA, US

Assignee:

STMicroelectronics, Inc. - Coppell TX

International Classification:

G06F 13/18
G06F 15/167
G09G 5/36
G06T 9/00

US Classification:

345541, 345535, 345542, 345547, 345555

Abstract:

An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard.