Ray R Hu

US Patent:

20130073763, Mar 21, 2013

Filed:

Sep 16, 2011

Appl. No.:

13/234925

Inventors:

Ray Ruey-Hsien Hu - Milpitas CA, US
Haiming Yu - Pleasanton CA, US
Hao-Yuan Howard Chou - San Jose CA, US

International Classification:

G06F 13/362

US Classification:

710113

Abstract:

An integrated circuit with memory elements is provided. The memory elements may be single-port memory cells that are used to provide multiport memory functionality. The integrated circuit may include an arbitration circuit operable to receive memory access requests from at least first and second request generators. The arbitration circuit may be configured to operate in a synchronous mode and an asynchronous mode. The arbitration circuit operating in the synchronous mode may perform port selection based on a predetermined logic table. The arbitration circuit operating in the asynchronous mode may execute a memory request as soon as it is received by the arbitration circuit. Requests received while a current memory access is being performed may be put on hold until the current memory access has been completed.