Richard D Cherne

US Patent:

53151445, May 24, 1994

Filed:

Sep 18, 1992

Appl. No.:

7/947177

Inventors:

Richard D. Cherne - West Melbourne FL

Assignee:

Harris Corporation - Melbourne FL

International Classification:

H01L 2701
H01L 2976
H01L 2712
H01L 2994

US Classification:

257351

Abstract:

The gain of a parasitic lateral bipolar device in an MOS SOI structure is reduced to increase the differential between the snap-back sustaining voltage and the maximum recommended power supply voltage. Prior to insulated gate structure definition, very lightly doped source and drain regions are implanted to the underlying insulator layer. The source and drain regions have a doping concentration that is within an order of magnitude of the doping concentration of the well portion of the semiconductor layer. After the very lightly doped regions have been implanted, the implant mask is stripped and an insulated gate structure is formed atop the channel surface portion of the well layer between the source and drain regions. Using the insulated gate structure as a mask, off-axis, high angle implants of the same conductivity type as the source and drain regions are carried out to a first depth that only partially penetrates the depth of the deep source and drain implants. Very shallow high impurity concentration ohmic contact regions are then formed in surface portions of the first and second regions, and ohmic contact layers are formed on the conductive gate layer and the high impurity concentration ohmic contact regions.

US Patent:

52930521, Mar 8, 1994

Filed:

Mar 23, 1992

Appl. No.:

7/855834

Inventors:

Richard D. Cherne - West Melbourne FL
James F. Buller - Indialantic FL
William H. Speece - Palm Bay FL

Assignee:

Harris Corporation - Melbourne FL

International Classification:

H01L 2701
H01L 2712
H01L 2904
H01L 2936

US Classification:

257349

Abstract:

An SOI/SOS thin film MOS mesa architecture has its body/channel region extended beyond the source and drain regions and the impurity concentration is increased at an end portion of the extended body region, so as to provide a channel stop region that is effective to functionally interrupt a current leakage path or `parasitic` N-channel that may be induced along sidewall surface of the P-type material of the body/channel region. In addition, in order to inhibit radiation-induced leakage along a backside interface of the extended body region abutting an underlying dielectric substrate, a portion of the extended body region between the channel stop region and the body/channel region has an impurity concentration profile that is increased at the interface of the extended body region with the underlying dielectric substrate.