Richard W Fleming

US Patent:

40178404, Apr 12, 1977

Filed:

Jun 15, 1973

Appl. No.:

5/370559

Inventors:

Kasimir W. Schild - Needham Heights MA
Richard D. Fleming - Geneva OH
Phil R. Harrington - Mount Prospect IL

Assignee:

GTE Automatic Electric Laboratories Incorporated - Northlake IL

International Classification:

G06F 1300

US Classification:

3401725

Abstract:

A computer memory control arrangement includes a plurality of input/output ports for permitting a central processor connected to one port to access a main memory to obtain/or store data or instructions for enabling the central processor to effect call processing or maintenance operations and for permitting the transfer of other programs to the main memory from a drum control memory including at least one drum control unit connected to a further port. A port select circuit permits port selection on a priority basis when memory requests are received over more than one port simultaneously. In addition, while the memory request for a selected port is being processed, the selection of a second port for a second memory request can be initiated before the end of the memory cycle for the first selected port. Each drum control unit has an assigned block of data storage locations or an initialization table of any computer main memory. The central processor can effect a transfer of instructions from a designated drum control unit to the main memory by accessing the main memory and storing instructions in the initialization table for the designated drum control unit and thereafter sending an instruction to the drum control unit to enable the drum control unit to access its initialization table and effect the transfer indicated therein.