Richard A Pierson

US Patent:

6563145, May 13, 2003

Filed:

Dec 29, 1999

Appl. No.:

09/474624

Inventors:

Charles E. Chang - Newbury Park CA 91320
Richard L. Pierson - Thousand Oaks CA 91360
Peter J. Zampardi - Westlake Village CA 91361
Peter M. Asbeck - San Diego CA 92130

International Classification:

H01L 29739

US Classification:

257197, 257200, 438 35, 438235, 438342, 438796

Abstract:

A compound collector double heterojunction bipolar transistor (CCHBT) incorporates a collector comprising two layers: a wide bandgap collector region (e. g. , GaAs), and a narrow bandgap collector region (e. g. , InGaP). The higher electric field is supported in the wide bandgap region, thereby increasing breakdown voltage and reducing offset voltage. At the same time, the use of wide bandgap material in the depleted portion of the collector, and a higher mobility material toward the end and outside of the depletion region, reduces series resistance as well as knee voltage.

US Patent:

6570406, May 27, 2003

Filed:

Nov 13, 2001

Appl. No.:

10/010825

Inventors:

Benjamim Tang - Hawthorne CA
Richard C. Pierson - Newport Beach CA

Assignee:

Primarion, Inc. - Tempe AZ

International Classification:

H03K 19003

US Classification:

326 86, 326 26, 326 27, 326 29

Abstract:

A method and circuit for pre-emphasis equalization of a high speed data communication system can be provided through the use of programmable pulse shaping. A data communication system configured with the pre-emphasis equalization circuit operates by receiving an input data stream and outputting a data stream for transmission through an interconnect or other transmission channel. The data can be passed through an output buffer configured with programmable pre-emphasis equalization, having input inverters at an input stage and output inverters at an output stage. During operation, once an input signal to the input stage transitions, for example from a low to a high state, an input signal to the output stage is configured to a full amplitude to drive the transmission channel. Once the output stage transitions to a full amplitude, the input of the output stage is configured closer to a mid-scale amplitude. The amount of amplitude change from full scale back to mid-scale determines the amount of equalization to be provided by the output buffer to the transmission channel.

US Patent:

6794900, Sep 21, 2004

Filed:

Jul 24, 2002

Appl. No.:

10/205340

Inventors:

Benjamim Tang - Hawthorne CA
Richard C. Pierson - Newport Beach CA

Assignee:

Primarion, Inc. - Tempe AZ

International Classification:

H03K 19003

US Classification:

326 86, 326 26, 326 27, 326 29

Abstract:

A method and circuit for pre-emphasis equalization of a high speed data communication system can be provided through the use of programmable pulse shaping. A data communication system configured with the pre-emphasis equalization circuit operates by receiving an input data stream and outputting a data stream for transmission through an interconnect or other transmission channel. The data can be passed through an output buffer configured with programmable pre-emphasis equalization, having input inverters at an input stage and output inverters at an output stage. During operation, once an input signal to the input stage transitions, for example from a low to a high state, an input signal to the output stage is configured to a full amplitude to drive the transmission channel. Once the output stage transitions to a full amplitude, the input of the output stage is configured closer to a mid-scale amplitude. The amount of amplitude change from full scale back to mid-scale determines the amount of equalization to be provided by the output buffer to the transmission channel.

US Patent:

6906359, Jun 14, 2005

Filed:

Oct 22, 2003

Appl. No.:

10/692134

Inventors:

Peter J. Zampardi - Newbury Park CA, US
Richard Pierson - Thousand Oaks CA, US

Assignee:

Skyworks Solutions, Inc. - Irvine CA

International Classification:

H01L031/0328

US Classification:

257197, 257192, 257 20, 257 24, 257272, 257273, 257274

Abstract:

According to one exemplary embodiment, a BiFET situated on a substrate comprises an emitter layer segment situated over the substrate, where the emitter layer segment comprises a semiconductor of a first type. The HBT further comprises a first segment of an etch stop layer, where the first segment of the etch stop layer comprises InGaP. The BiFET further comprises a FET situated over the substrate, where the FET comprises source and drain regions, where a second segment of the etch stop layer is situated under the source and drain regions, and where the second segment of the etch stop layer comprises InGaP. The FET further comprises a semiconductor layer of a second type situated under the second segment of the etch stop layer. The etch stop layer increases linearity of the FET and does not degrade electron current flow in the HBT.

US Patent:

7492134, Feb 17, 2009

Filed:

Jul 3, 2006

Appl. No.:

11/480715

Inventors:

Benjamim Tang - Rancho Palos Verdes CA, US
Robert T. Carroll - Andover MA, US
Nicholas R. Steffen - Redondo Beach CA, US
Richard C. Pierson - Newport Beach CA, US

Assignee:

Primarion, Inc. - Tempe AZ

International Classification:

G05F 1/00

US Classification:

323241, 323283

Abstract:

Disclosed is a power regulator for providing precisely regulated power to a microelectronic device such as a microprocessor. Improved power regulation is accomplished by optimizing the power efficiency of the power regulator. In particular, in a multiphase system, the number of active phases is increased or decreased to achieve optimum power efficiency. The multiphase voltage regulator adapts the operating mode to maximize efficiency as the load current demand of the load device changes by adjusting the number of active phases to maximize efficiency. The total value of current provided by the regulator and the total number of active phases is determined, the total number of active phases is compared with the number of active phases required to provide the total value of current at maximum efficiency; and the number of active phases is adjusted to provide the total value of current at maximum efficiency. A current sense circuit senses the current at each phase, a summing circuit coupled to the output of the current sense circuit provides the total current value of all the measured phases, a circuit coupled to the output of the summing circuit provides the time averaged total current value to a threshold detecting circuit that determines the number of phases at which the voltage regulator should be operating for maximum efficiency, and a circuit for comparing the number of phases that are operating to the number of phases at which the voltage regulator should be operating adjusts the number of active phases to the number of phases at which the voltage regulator should be operating for maximum efficiency.

US Patent:

7521913, Apr 21, 2009

Filed:

Dec 19, 2005

Appl. No.:

11/311115

Inventors:

Benjamim Tang - Rancho Palos Verdes CA, US
Robert T. Carroll - Andover MA, US
Scott Wilson Southwell - Seal Beach CA, US
Kenneth A. Ostrom - Palos Verdes Estates CA, US
Richard C. Pierson - Newport Beach CA, US

Assignee:

Primarion Corporation - Torrance CA

International Classification:

G05F 1/618

US Classification:

323283, 323272, 323284

Abstract:

Disclosed is a multi-phase pulse width modulated voltage regulator and method in which transient voltage excursions or deviations that exceed the load line voltage by more than a pre-determined amount are detected by an ATR circuit and a correction signal is applied. The correction signal is in the form of asynchronous pulses and the number of such pulses is a function of the magnitude of the voltage excursion as determined by the number of thresholds that are exceeded. Also disclosed is an adaptive voltage positioning (AVP) circuit and method for early detection of a transient event by sensing voltage changes at the load and adjusting the target voltage with pre-determined current values prior to the time that ATR event changes in the current at the load are detected. The AVP load line is pre-positioned for more precise current control. Also disclosed is an adaptive filter with adjustable frequency characteristics in response to an ATR event.

US Patent:

8193796, Jun 5, 2012

Filed:

Feb 16, 2009

Appl. No.:

12/371835

Inventors:

Benjamim Tang - Rancho Palos Verdes CA, US
Robert T. Carroll - Andover MA, US
Nicholas R. Steffen - Redondo Beach CA, US
Richard C. Pierson - Newport Beach CA, US

Assignee:

Infineon Technologies Austria AG - Villach

International Classification:

G05F 1/00

US Classification:

323283, 323272

Abstract:

Disclosed is a power regulator for providing precisely regulated power to a microelectronic device such as a microprocessor. Improved power regulation is accomplished by optimizing the power efficiency of the power regulator. In particular, in a multiphase system, the number of active phases is increased or decreased to achieve optimum power efficiency. The multiphase voltage regulator adapts the operating mode to maximize efficiency as the load current demand of the load device changes by adjusting the number of active phases to maximize efficiency. The total value of current provided by the regulator and the total number of active phases is determined, the total number of active phases is compared with the number of active phases required to provide the total value of current at maximum efficiency; and the number of active phases is adjusted to provide the total value of current at maximum efficiency. A current sense circuit senses the current at each phase, a summing circuit coupled to the output of the current sense circuit provides the total current value of all the measured phases, a circuit coupled to the output of the summing circuit provides the time averaged total current value to a threshold detecting circuit that determines the number of phases at which the voltage regulator should be operating for maximum efficiency, and a circuit for comparing the number of phases that are operating to the number of phases at which the voltage regulator should be operating adjusts the number of active phases to the number of phases at which the voltage regulator should be operating for maximum efficiency.

US Patent:

8541995, Sep 24, 2013

Filed:

Feb 3, 2012

Appl. No.:

13/365908

Inventors:

Benjamin Tang - Rancho Palos Verdes CA, US
Robert T. Carroll - Andover MA, US
Scott Wilson Southwell - Seal Beach NC, US
Kenneth A. Ostrom - Palos Verdes Estates CA, US
Richard C. Pierson - Newport Beach CA, US

Assignee:

Infineon Technologies Austria AG - Villach

International Classification:

G05F 1/575

US Classification:

323272, 323283, 323284

Abstract:

A multiphase power regulator includes a multiphase pulse width modulator, an output stage and an active transient response circuit. The output stage includes a high side transistor, a low side transistor and an inductor. The output stage is configured to supply power to a load responsive to signals generated by the multiphase pulse width modulator. The active transient response circuit is coupled between the output stage and the multiphase pulse width modulator and configured to detect the voltage level at the output stage and provide a signal to the multiphase pulse width modulator that is a function of the amplitude of the deviation of the detected voltage level from a target voltage.