Richard William Webb

US Patent:

46148990, Sep 30, 1986

Filed:

Jul 8, 1983

Appl. No.:

6/512152

Inventors:

Richard C. Webb - Boulder CO
James R. Webb - Boulder CO

Assignee:

Data Ray Corporation - Broomfield CO

International Classification:

H01J 2970
G05F 1140

US Classification:

315411

Abstract:

A voltage regulator for flyback-type high voltage supplies having a supplementary energy storage transformer with its secondary interconnected in series with the primary of the conventional flyback transformer, a control circuit for sensing (a) the generation of the conventional flyback pulse, (b) a reference voltage, and (c) a feedback voltage signal appearing at the output of the conventional flyback transformer and a switch for selectively applying energy to the primary of the supplemental energy storage transformer. The aforesaid switch being activated whenever the feedback voltage is less than the reference voltage and said switch being activated earlier in time as the aforesaid difference becomes greater. Just after the occurrence of the flyback pulse, the switch is opened to permit energy in the energy storage transformer to be placed on the primary of the flyback transformer so that it is added with the flyback pulse to maintain the resultant voltage at the output of the secondary conventional flyback transformer at a regulated value.

US Patent:

48211745, Apr 11, 1989

Filed:

Jun 21, 1988

Appl. No.:

7/211126

Inventors:

Richard F. Webb - Baltimore MD
Charles W. Brooks - Wayland MA

Assignee:

Westinghouse Electric Corp. - Pittsburgh PA

International Classification:

G06F 1300

US Classification:

364200

Abstract:

A signal processing system that includes a ring bus; a multiplicity of system modules, each coupled to the ring bus and operative to receive and transfer blocks of data words over the ring bus; and a bus control module coupled to the ring bus and operative to support simultaneous data transfers between specified pairs of system modules in accordance with concurrent execution of multiple programs of data transfer instructions. In an alternate embodiment, the signal processing system may include a plurality of ring buses wherein each system module is coupled to all of the ring buses and operative to receive and transfer blocks of data words over any one of the ring buses. In addition, the bus control module is also coupled to all of the ring buses and operative to support simultaneous data transfers between specified pairs of system modules over all of the ring buses. Moreover, each ring bus may comprise individual bus segments for system module to system module coupling about the ring.

US Patent:

47605251, Jul 26, 1988

Filed:

Jun 10, 1986

Appl. No.:

6/872737

Inventors:

Richard F. Webb - Baltimore MD

Assignee:

The United States of America as represented by the Secretary of the Air
Force - Washington DC

International Classification:

G06F 15347
G06F 1531
G06F 15332

US Classification:

364200

Abstract:

The processor is optimized for high-speed processing of large vectors, to fully utilize VHSIC technology, and to implement a signal processor having the highest possible throughput per volume while maintaining flexibility. It includes a 25 MHz embedded 1750A computer for performing control function scalar operations and set-up of vector signal processing instructions to be performed by a vector processing unit. The 40 MHz vector processing unit (VPU) performs high speed processing of real and complex vectors. The VPU's control portion provides an interface and status to the embedded 1750A computer. It also provides the control necessary for vector processing to occur concurrently with 1750A execution and concurrent with I/O of vector data.