Robert J Busch

US Patent:

52768465, Jan 4, 1994

Filed:

Jan 30, 1992

Appl. No.:

7/829608

Inventors:

Frederick J. Aichelmann - Hopewell Junction NY
Bruce E. Bachman - Hopewell Junction NY
Robert E. Busch - Colchester VT
Theodore M. Redman - Milton VT
Endre P. Thoma - Colchester VT

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1206

US Classification:

395425

Abstract:

A memory chip, comprising a chip memory section organized to hold a plurality of separate blocks of data, with each of the data blocks containing M individual data units; a circuit for addressing a given block of data in the chip memory section; and an N data unit chip parallel output interface from the memory chip where N is less than M, and N is greater than one. The memory chip further comprises a chip register for receiving from the chip memory section at least a portion of an addressed block of data, which portion comprises P data units, where P is greater than N, the chip register having P register stages for holding the P data units of the addressed data block, wherein the P register stages are grouped into at least a first and second groups of stages, with no group of stages comprising more than N register stages and with at least one of the groups of register stages having a plurality of stages. The memory chip also includes a gating structure for gating the respective groups of stages to the N data unit parallel output interface, the gating structure including at least a first gate circuit for gating in parallel the data units held in the first group of stages to the N data unit parallel output interface in accordance with a TOGGLE logic signal, and a second gate circuit for gating in parallel the data units held in the second group of stages to the N data unit parallel output interface in accordance with a NOT TOGGLE logic signal.

US Patent:

54572568, Oct 10, 1995

Filed:

Jun 6, 1994

Appl. No.:

8/254850

Inventors:

Michael J. Mitariten - Peekskill NY
Robert K. Busch - Grand Island NY

Assignee:

UOP - Des Plaines IL

International Classification:

C07C 5327
F25J 306

US Classification:

585655

Abstract:

A process is disclosed for the catalytic dehydrogenation of C. sub. 3 -C. sub. 4 hydrocarbons wherein an integrated scheme comprising a cold box unit and a pressure swing adsorption unit is employed to reject methane produced in the dehydrogenation reaction from the hydrogen-rich recycle stream. The process results in a significant improvement in the efficiency of the separation of the reaction by-products and a corresponding increase in the overall feed capacity of the process.