Robert O Farrell

Address:

1075 Corkwood St, Hollywood, FL 33019

VIN:

3VWRF31Y87M404101

Make:

VOLKSWAGEN

Model:

NEW BEETLE

Year:

2007

US Patent:

20080208671, Aug 28, 2008

Filed:

Feb 28, 2007

Appl. No.:

11/680039

Inventors:

Kate Ehrlich - Newton MA, US
Robert George Farrell - Cornwall NY, US
Mary Elizabeth Helander - North White Plains NY, US
Michael Sidney Karasick - Austin TX, US

International Classification:

G06Q 10/00

US Classification:

705 9

Abstract:

A computer-implement method and the associated system of computing resources provides an automated work force management capability that optimizes work assignments for individual workers using work force management techniques in combination with social networking analysis (SNA). The work force management attributes are enhanced using SNA. Bipartite graphing processes are used to match the socially enhance worker attributes with the work requirements. By combining the social networking information with the work force management attributes, work assignments are optimized. This optimization exploits historical social interactions between workers and combines their influence with the skills and other work force attributes of each worker required for job performance.

US Patent:

46370242, Jan 13, 1987

Filed:

Nov 2, 1984

Appl. No.:

6/667520

Inventors:

Jerry D. Dixon - Boca Raton FL
Robert H. Farrell - Coral Springs FL
Gerald A. Marazas - Boca Raton FL
Andrew B. McNeill - Deerfield Beach FL
Gerald U. Merckel - Delray FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1100

US Classification:

371 67

Abstract:

A redundant error-detecting addressing code for use in a cache memory. A directory converts logical data addresses to physical addresses in the cache where the data is stored in blocks. The blocks are expanded to include redundant addressing information such as the logical data address and the physical cache address. When a block is accessed from the cache, the redundant addressing is compared to the directory addressing information to confirm that the correct data has been accessed.

US Patent:

43441327, Aug 10, 1982

Filed:

Dec 14, 1979

Appl. No.:

6/103782

Inventors:

Jerry D. Dixon - Boca Raton FL
Robert H. Farrell - Coral Springs FL
Francis R. Koperda - Delray Beach FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 300
G06F 506

US Classification:

364200

Abstract:

Serial storage interface apparatus for coupling a serial storage mechanism, such as a charge coupled storage device or a magnetic bubble storage device, to a data processor input/output (I/O) bus. Speed control circuitry is provided for causing the serial storage mechanism to operate at a higher speed when the data processor is responding more rapidly to data transfer requests from the interface apparatus and at a lower speed when the data processor is responding less rapidly to data transfer requests from the interface apparatus. This speed adjustment feature reduces the amount of data buffering required for interfacing a serial storage mechanism to an asynchronous variable response time I/O bus system.

US Patent:

48253570, Apr 25, 1989

Filed:

Oct 14, 1987

Appl. No.:

7/110080

Inventors:

Hernando Ovies - Boca Raton FL
Neil A. Katz - Boca Raton FL
Robert H. Farrell - Coral Springs FL
Ernest D. Baker - Boca Raton FL

Assignee:

International Business Machine Corporation - Armonk NY

International Classification:

G06F 1300

US Classification:

364200

Abstract:

An I/O controller for a computer system having a plurality of memory devices of different types such as floppy and hard disks, whereinn a single cache memory is employed for all of the memory devices. Each of the memory devices is provided with its own interface device which directs data outputted from the associated memory device onto a common device bus. From the device bus data is transferred to a cache memory via a separate cache bus, and then to a system processor via the same cache bus. Memory space within the cache memory may be allocated among the various memory devices.

US Patent:

48316202, May 16, 1989

Filed:

Jun 13, 1988

Appl. No.:

7/207891

Inventors:

John W. Conway - Waltham MA
Robert J. Farrell - Wakefield MA
Allen C. Hirtle - Littleton MA
Leonard E. Niessen - Framingham MA

Assignee:

Bull HN Information Systems Inc. - Billerica MA

International Classification:

H04J 300

US Classification:

370 85

Abstract:

A local area network (LAN) system is provided that is capable of accommodating a variety of computer subsystem types, and having a LAN controller which can control at substantially the same time a plurality of LANs of the same type or a plurality of different types of LANs.

US Patent:

44647182, Aug 7, 1984

Filed:

Jul 30, 1982

Appl. No.:

6/404200

Inventors:

Jerry D. Dixon - Boca Raton FL
Robert H. Farrell - Coral Springs FL
Gerald U. Merckel - Delray FL
Jack D. Neely - Boca Raton FL
Stephen A. Schmitt - Rochester MN
William G. Verdoorn - Rochester MN
Peter B. Bandy - Pine Island MN

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1538

US Classification:

364200

Abstract:

A method and apparatus for performing data base searches in which the host processor and main memory are free for other processing tasks between the time that the host processor requests the search until the search results are reported back to the host processor. To commence the search, an input/output controller communicates from the host processor to a record scan circuit values of a skip length, a key length and a data length. While data records are received serially from disk files, within each data record, a length of data equal to the specified skip length is initially skipped. Following this, a search argument is compared with a length of data specified by the key length value. This comparison operation is alternated with skipping of data specified by the data length value until the end of the record is reached or until a specified number of comparisons has taken place. The data record is stored as it is received from the files.

US Patent:

46964789, Sep 29, 1987

Filed:

Nov 1, 1985

Appl. No.:

6/794051

Inventors:

Robert F. Farrell - Quincy MA

International Classification:

A63F 300

US Classification:

273261

Abstract:

A neutral or a demilitarized zone (DMZ) is provided for a matrix-type "detente" piece-capture board game in which only one piece at a time can occupy a given square or point, with the neutral zone providing a safe haven for all elements utilized in playing the game. The neutral zone can take the form of an offset cruciform arrangement of spaces or a square outline of spaces. The neutral zone can be differentiated from the other spaces on the board by color differentiating the spaces within and outside the zone. Alternatively, the neutral zone can be differentiated by a line that circumscribes the zone.

US Patent:

43487254, Sep 7, 1982

Filed:

Jan 19, 1977

Appl. No.:

5/760772

Inventors:

Robert J. Farrell - Wakefield MA
Kenneth T. Coit - Milford NH
John H. Vernon - Milford MA
Kin C. Yu - Burlington MA
Robert E. Huettner - Acton MA
John P. Grandmaison - NH

Assignee:

Honeywell Information Systems Inc. - Waltham MA

International Classification:

G06F 922

US Classification:

364300

Abstract:

A programmable communications processor is coupled to execute instructions of programs designed to process the transfer of information between a plurality of communication channels and a main memory included in the system. A software implemented and controlled pause counter enables the execution of a given maximum number of instructions for servicing, for example, a communication channel following which it suspends or pauses such servicing, in order to service another higher priority request which may be pending. Processing of lower priority service requests thus cannot delay the recognition and handling of higher priority requests for more than a minimum period of time and the effective throughput rate is increased.