Robert M Hardy

US Patent:

52610128, Nov 9, 1993

Filed:

May 11, 1992

Appl. No.:

7/881108

Inventors:

Robert M. Hardy - Scotia NY
James E. Wheeler - Schenectady NY
John R. Meckley - Voorhees NJ

Assignee:

General Electric Company - Syracuse NY

International Classification:

G06K 944

US Classification:

382 55

Abstract:

Image data is subjected to a thinning process so as to derive a medial axis for each image. Boolean image data is reduced to lines and/or dots, each line generally being a centroid line of an image. The thinning process uses a change look-up table which is addressed using values from pixels in the neighborhood of a particular pixel which is the target for possible change. Pixels in the neighborhood which are to be evaluated are given a weight by use of a weight look-up table and the weight of the pixel is multiplied by the value of the pixel. Alternately, the weight of the pixel may be added to the pixel value. The pixels in the neighborhood of a target pixel (i. e. , pixel which is being evaluated for possible removal) have their weights and values taken into account by a summation of the results of the multiplication (or addition) performed for each pixel so as to provide an address used to address a change look-up table which supplies an output indicative of change in the target pixel. The thinning is accomplished by a floating point processor using a pipelined procedure.

US Patent:

48004910, Jan 24, 1989

Filed:

Nov 17, 1986

Appl. No.:

6/931314

Inventors:

Robert M. Hardy - Scotia NY

Assignee:

General Electric Company - Schenectady NY

International Classification:

G06F 1200
G11C 700

US Classification:

364200

Abstract:

A register-stack apparatus comprising first and second registers, first and second stack memories respectively coupled to store the register contents, first and second modifiers for providing the respective register contents in predetermined modified forms, and first and second select means for receiving a plurality of inputs including the modified register contents and, in accordance with a control command, applying a single output to the respective registers for storage therein, is disclosed. The register-stack apparatus is implemented in the controller of a computing system in which the controller receives macro-instructions from a host computer and, in response, provides microcode to an attached computing device. The register-stack apparatus is implemented as a program counter, I/O device, and plurality of register files and enables execution of CALLs, INTERRUPTs, and RETURNs with a minimal number of no-op instructions being issued to the attached computing device.

US Patent:

43934463, Jul 12, 1983

Filed:

Apr 27, 1981

Appl. No.:

6/258122

Inventors:

George P. Gurr - Phoeniz AZ
Robert M. Hardy - Scotia NY

Assignee:

General Electric Company - Schenectady NY

International Classification:

G06F 1130

US Classification:

364200

Abstract:

The processing of computer program delays and timers is placed outside the computer mainframe in a routine timer in order to reduce the amount of computer processing capability dedicated to keeping track of time intervals to be performed by the computer. Such a routine is particularly applicable to systems controlling a plurality of devices in which each device is controlled by a separate computer program designed to operate the device in a predetermined manner in response to specific conditions detected at the hardware site and transmitted to the computer.

US Patent:

45257639, Jun 25, 1985

Filed:

Nov 30, 1983

Appl. No.:

6/556744

Inventors:

Robert M. Hardy - Scotia NY
William J. Premerlani - Scotia NY

Assignee:

General Electric Company - Schenectady NY

International Classification:

H02H 708

US Classification:

361 24

Abstract:

An apparatus for predicting the remaining useful life of a motor uses the temperature and past history of the motor to determine the amount of insulation degradation for its prediction. The remaining useful life projection is provided at a display and may be used to trip the circuit breakers supplying power to the motor when projected life is shorter than the expected life or may be used to issue a warning that the rate of motor degradation exceeds the rate necessary to achieve the expected life for the motor. Motor protection is provided by tripping the circuit breakers supplying power to the motor before the actual temperature of the motor windings exceeds the temperature at which catastrophic and irreversible insulation failure would occur while not tripping the breakers for momentary transients.

US Patent:

46944168, Sep 15, 1987

Filed:

Feb 25, 1985

Appl. No.:

6/705290

Inventors:

James E. Wheeler - Schenectady NY
Robert M. Hardy - Scotia NY
Robert J. Dunki-Jacobs - Saratoga NY
William J. Premerlani - Scotia NY

Assignee:

General Electric Company - Schenectady NY

International Classification:

G06F 738
G06F 1500

US Classification:

364736

Abstract:

Method and apparatus are provided for performing a plurality of digital signal processing functions wherein each said function is a unique combination of identical subfunctions. A plurality of operating units are provided wherein each operating unit is adapted to perform one said subfunction. Apparatus and method are disclosed for programmably configuring these operating units in a variety of serial combinations wherein each combination will perform a respective signal processing function.