A circuit for storing data in a random access memory containing one defective bit per word. A separate read-only memory device or programmable logic array is provided to produce an interrupt bit whenever a memory location containing a defective bit is addressed, where a defective bit is defined as one that is stuck at 1 or stuck at 0. If an interrupt bit is generated the data word is read out from memory and compared to the original. If an equality exists, nothing further is required. If there is an inequality the data word is complemented and stored, and a flag bit is set. When data is read from memory, if the flag bit is set, the data word is complemented again before being used.
Message Transmitting System For Reproduction Machines And Copiers
James M. Donohue - Los Alamitos CA Robert E. Markle - Rancho Palos Verdes CA George E. Mager - Hermosa Beach CA Stephen P. Wilczek - Fairport NY
Assignee:
Xerox Corporation - Stamford CT
International Classification:
G06F 900 G03G 1500
US Classification:
364900
Abstract:
A copy reproduction machine is subdivided into discrete operating modules and coupled together by a shared communication line over which operating messages from and to the modules are transmitted. Each module includes a receiver for intercepting and capturing messages bearing the module's address and a transmitter for transmitting messages from the module and addressed to other modules over the shared communication line.
Robert Markle (1998-2002), Matthew Isaac (1999-2003), Lisa Fritz (1988-1992), Darcy Supina (1977-1981), Timothy Laub (1998-2002), Dawn Moyer (1988-1992)