Robert W Ray

US Patent:

20210239737, Aug 5, 2021

Filed:

Jan 31, 2020

Appl. No.:

16/779279

Inventors:

- Redmond WA, US
Robert James Ray - Snoqualmie WA, US
Benjamin Schanz - Seattle WA, US

International Classification:

G01R 13/02
G06K 9/00

Abstract:

Signal analysis arrangements and techniques for electrical signals monitored by oscilloscope devices are discussed herein. In one example, a method includes obtaining one or more digital images that capture an oscilloscope user interface presenting a trace of a signal monitored by the oscilloscope, and processing at least the trace in the one or more digital images to decode a connotation of the signal. Based at least on the connotation, the method includes generating an annotation overlay indicating one or more characteristics of the signal.

US Patent:

20190278741, Sep 12, 2019

Filed:

May 2, 2018

Appl. No.:

15/969058

Inventors:

- Redmond WA, US
Peter A. ATKINSON - Sammamish WA, US
Robert James RAY - Snoqualmie WA, US
Garrett Douglas BLANKENBURG - Sammamish WA, US
Andres Felipe HERNANDEZ - Seattle WA, US

Assignee:

Microsoft Technology Licensing, LLC - Redmond WA

International Classification:

G06F 15/78

Abstract:

An example method for adjusting operation of an integrated circuit includes testing a plurality of electronic elements of the integrated circuit including one or more redundant electronic elements designated as inactive according to a manufacturer's default configuration of the integrated circuit to determine one or more operating parameters of the integrated circuit. The method further includes selecting a subset of electronic elements from the plurality of electronic elements based on the one or more operating parameters, wherein the subset of electronic elements is designated as active according to an updated configuration of the integrated circuit, and controlling operation of the integrated circuit using the updated configuration instead of the manufacturer's default configuration.

US Patent:

20190171278, Jun 6, 2019

Filed:

Jan 28, 2019

Appl. No.:

16/259140

Inventors:

- Redmond WA, US
Garrett Douglas Blankenburg - Sammamish WA, US
Peter Anthony Atkinson - Sammamish WA, US
Robert James Ray - Snoqualmie WA, US
Andres Felipe Hernandez Mojica - Seattle WA, US
Samy Boshra-Riad - Bellevue WA, US
Brian Keith Langendorf - Benicia CA, US

International Classification:

G06F 1/3296
G01R 31/30
G06F 11/07
G06F 11/24
G06F 1/3225

Abstract:

Power reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method includes executing a voltage characterization service for a processing device of a computing apparatus to determine at least one supply voltage for the processing device, the voltage characterization service comprising a functional test that exercises the processing device at iteratively adjusted voltages in context with associated system elements of the computing apparatus. During execution of the voltage characterization service, the method includes monitoring for operational failures of at least the processing device, and responsive to the operational failures, determining at least one resultant supply voltage.

US Patent:

20170357279, Dec 14, 2017

Filed:

Jun 10, 2016

Appl. No.:

15/178966

Inventors:

- Redmond MA, US
Garrett Douglas Blankenburg - Sammamish WA, US
Peter Anthony Atkinson - Sammamish WA, US
Robert James Ray - Snoqualmie WA, US
Andres Felipe Hernandez Mojica - Seattle WA, US
Samy Boshra-Riad - Bellevue WA, US
Brian Keith Langendorf - Benicia CA, US

International Classification:

G05F 1/625
G05B 15/02

Abstract:

Secure voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method of controlling operating voltages for a processing device includes initializing a security portion of the processing device after application of input voltages to the processing device as supplied by voltage regulation circuitry according to voltage identifiers (VIDs) established for the processing device. The method includes, in the security portion, generating adjusted input voltages based on at least the VIDs and authenticated voltage offset information stored according to a digitally signed security process, and instructing the voltage regulation circuitry to supply the adjusted input voltages to the processing device.

US Patent:

20170357298, Dec 14, 2017

Filed:

Jun 10, 2016

Appl. No.:

15/178912

Inventors:

- Redmond WA, US
Garrett Douglas Blankenburg - Sammamish WA, US
Peter Anthony Atkinson - Sammamish WA, US
Robert James Ray - Snoqualmie WA, US
Andres Felipe Hernandez Mojica - Seattle WA, US
Samy Boshra-Riad - Bellevue WA, US
Brian Keith Langendorf - Benicia CA, US

International Classification:

G06F 1/20
G06F 1/32

Abstract:

Thermal reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In a first example, a method of operating a voltage control system for a processing device includes operating the processing device in a computing assembly at a selected performance level, the processing device supplied with at least one input voltage at a first voltage level. The method includes monitoring thermal information associated with the computing assembly, and when the thermal information indicates a temperature associated with the computing assembly exceeds a threshold temperature, adjusting the at least one input voltage level supplied to the processing device to a second voltage level lower than the first voltage level and continuing to operate the processing device at the selected performance level.

US Patent:

20170357310, Dec 14, 2017

Filed:

Jun 10, 2016

Appl. No.:

15/178873

Inventors:

- Redmond WA, US
Garrett Douglas Blankenburg - Sammamish WA, US
Peter Anthony Atkinson - Sammamish WA, US
Robert James Ray - Snoqualmie WA, US
Andres Felipe Hernandez Mojica - Seattle WA, US
Samy Boshra-Riad - Bellevue WA, US
Brian Keith Langendorf - Benicia CA, US

International Classification:

G06F 1/32
G06F 11/30
G06F 1/20

Abstract:

Voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method of determining operating voltages for a processing device includes executing a voltage adjustment process to determine at least one input voltage for the processing device lower than a manufacturer specified operating voltage. During the voltage adjustment process, the method includes applying incrementally adjusted input voltages to the processing device, operating the processing device according to a functional test that exercises the processing device in context with associated system elements of a computing assembly, and monitoring for operational failures of at least the processing device during application of each of the incrementally adjusted input voltages. Responsive to the operational failures, the method includes determining corresponding values of the incrementally adjusted input voltages and establishing an input voltage based at least in part on the corresponding values of the incrementally adjusted input voltages.

US Patent:

20170357311, Dec 14, 2017

Filed:

Jun 10, 2016

Appl. No.:

15/179016

Inventors:

- Redmond WA, US
Garrett Douglas Blankenburg - Sammamish WA, US
Peter Anthony Atkinson - Sammamish WA, US
Robert James Ray - Snoqualmie WA, US
Andres Felipe Hernandez Mojica - Seattle WA, US
Samy Boshra-Riad - Bellevue WA, US
Brian Keith Langendorf - Benicia CA, US

International Classification:

G06F 1/32
G06F 11/07
G06F 1/20

Abstract:

Power reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method includes receiving a voltage characterization service over a communication interface of the computing apparatus as transferred by a deployment platform remote from the computing apparatus. The method includes executing the voltage characterization service for a processing device of the computing apparatus to determine at least one input voltage for the processing device lower than a manufacturer specified operating voltage, the voltage characterization service comprising a functional test that exercises the processing device at iteratively adjusted voltages in context with associated system elements of the computing apparatus. During execution of the voltage characterization service, the method includes monitoring for operational failures of at least the processing device, and responsive to the operational failures, restarting the processing device using a recovery voltage higher than a current value of the iteratively adjusted voltages.

Address:

3805 E Madison St, Seattle, WA 98112

VIN:

5FNYF4H98BB010503

Make:

HONDA

Model:

PILOT

Year:

2011

Address:

16924 SE 254 Pl, Covington, WA 98042

VIN:

1FAHP32N79W201094

Make:

FORD

Model:

FOCUS

Year:

2009