Roger B Jennings

US Patent:

48292427, May 9, 1989

Filed:

Dec 7, 1987

Appl. No.:

7/129495

Inventors:

David H. Carey - Austin TX
Roger B. Jennings - New York NY

Assignee:

Microelectronics and Computer Technology Corporation - Austin TX

International Classification:

G01R 3100

US Classification:

324158P

Abstract:

A multigigahertz probe for testing electrical micro connections or wafers. A body has a top, bottom and a testing tip at one end, and the one end slants upwardly and inwardly from the bottom towards the top. At least one coaxial cable is carried by the body and includes a first connector end and a second testing end forming testing contacts. The testing end extends to the intersection of the bottom and the slanting one end of the body.

US Patent:

61102180, Aug 29, 2000

Filed:

Jun 1, 1998

Appl. No.:

9/088345

Inventors:

Roger H. Jennings - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 1750

US Classification:

703 22

Abstract:

Multiple test cycles may be randomly generated for simultaneous execution on a design under test using a simultaneous random cycles test generator. One form of the test generator is hardware description code run on a simulator. The test generator provides multiple random cycle description generators. A random cycle description generator randomly generates a particular test cycle at runtime using constraints provided by the test generator. A random cycle description generator granted access to a serial common cycle initiator may initiate random test cycles through the common cycle initiator. The common cycle initiator may execute the randomly determined test cycle or define and arm a cycle executor of a plurality of cycle executors to execute the randomly determined test cycle. While one random test cycle is executed, another random cycle description generator is selected to initiate another random test cycle on the common cycle initiator. The newly initiated test cycle is then executed while the initial test cycle is executing, accomplishing simultaneous execution of multiple test cycles.