Ronald L Michels

US Patent:

51382857, Aug 11, 1992

Filed:

Jul 19, 1991

Appl. No.:

7/732984

Inventors:

Ronald L. Michels - Washington NJ

Assignee:

Anadigics, Inc. - Warren NJ

International Classification:

H03B 500

US Classification:

331116FE

Abstract:

A simple and broadly applicable method for reducing phase noise in varactor tuned voltage-controlled oscillators (VCOs) is described. In particular, it is shown that by appropriately selecting the inductance of a choke inductor used to isolate the varactor from its DC bias supply, this inductor will also perform a noise filtering function by shunting off part of the internally generated low frequency random electronic noise through the DC supply, thus reducing a primary contributor of oscillator phase noise. Versions of this phase noise reduction method appropriate for the Colpitts, Hartley, and Clapp type LC voltage-controlled oscillator topologies are illustrated.

US Patent:

20200126902, Apr 23, 2020

Filed:

Sep 27, 2019

Appl. No.:

16/586688

Inventors:

- Woburn MA, US
Boris Gedzberg - Hillsborough NJ, US
Ronald L. Michels - Califon NJ, US

International Classification:

H01L 23/522
H01L 23/532

Abstract:

A method for metallization during fabrication of an Integrated Circuit (IC). The IC includes a semiconductor wafer having a back surface and a front surface. The method includes etching a via hole through the semiconductor wafer. After this, a seed metal layer is deposited on the back surface of the semiconductor wafer. Thereafter, a photoresist layer is deposited on the back surface of the semiconductor wafer such that the via hole remains uncovered. After depositing the photoresist layer, a metal layer is formed along the walls of the via hole to electrically connect the back surface and the front surface of the semiconductor wafer. Finally, the photoresist layer is removed subsequent to forming the metal layer.