Ronald C Roth

US Patent:

6542282, Apr 1, 2003

Filed:

Dec 31, 2001

Appl. No.:

10/036697

Inventors:

David M. Smith - Plano TX
Eric R. Trumbauer - Frisco TX
Ronald C. Roth - McKinney TX
Brian P. Scott - Sachse TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G02B 2600

US Classification:

359291, 438707, 430 11

Abstract:

A method of patterning a metal layer that cleans the residue from a metal etch process without removing a photoresist etch mask. The method is particularly useful for the fabrication of micromirror devices, or other MEMS devices that use photoresist spacer layers. A photoresist layer is spun on to the mirror metal layer in step The photoresist is patterned and developed in step to form openings to the metal layer. The openings define areas where the mirror metal layer will be removed. The patterned photoresist is inspected in step The mirror metal layer is etched in step using the patterned photoresist layer as an etch mask. After the mirror metal has been etched, the webbing and other residues are removed in a clean up process that uses photoresist developer as a solvent to remove the webbing. After the developer clean up process, the mirrors are inspected in step to verify the proper gaps have been etched between the mirrors and the removal of the mirror etch residue. A photoresist saw prep coating is then spun onto the wafer in step the wafers are sawn in step and scrubbed in step before the mirrors are undercut in step The undercut process removes the photoresist spacer layers on which the hinge yoke and mirror have been fabricated, allowing mirrors to rotate about the torsion hinges.

US Patent:

7430072, Sep 30, 2008

Filed:

Apr 12, 2006

Appl. No.:

11/402411

Inventors:

Ronald Charles Roth - McKinney TX, US
Timothy Joseph Hogan - Allen TX, US
Lucius Sherwin - Plano TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G02B 26/00
B29D 11/00
G03C 5/00

US Classification:

359291, 359292, 359298, 216 24, 430321

Abstract:

System and method for maximizing image quality by eliminating vias on a reflective surface. A preferred embodiment comprises depositing a first portion of a mirror surface over a support surface, applying a protective coating on the mirror surface, and then inverting the via. The preferred embodiment also comprises removing a portion of the inverted via and then depositing a second portion of the mirror surface. The remaining portion of the inverted via fills the via and provides a level surface for the depositing of the second portion of the mirror surface, reducing the amount of light scattered by the via.

US Patent:

7622244, Nov 24, 2009

Filed:

Apr 20, 2006

Appl. No.:

11/407634

Inventors:

Erika Lee McFadden - Dallas TX, US
Ronald Charles Roth - McKinney TX, US
Lisa Ann Wesneski - The Colony TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 21/00
G03F 1/00

US Classification:

430320, 430311, 430321, 430330, 216 24, 134 13

Abstract:

Method for removing contaminants from a surface during semiconductor fabrication. A preferred embodiment comprises developing a resist layer on a top surface of a semiconductor substrate, curing the developed resist layer, and cleaning the developed resist layer with a developer solution to remove contaminants. The cleaning makes use of the same developer solution used to develop the resist layer, so the cleaning makes use of a process that already exists and requires no additional investment to implement, while the curing stabilizes the developed resist layer so that the cleaning does not damage the developed resist layer.

US Patent:

8112168, Feb 7, 2012

Filed:

Jul 29, 2009

Appl. No.:

12/511370

Inventors:

Madhu Sudan Ramavajjala - Plano TX, US
Kristi Bushman - Richardson TX, US
Robert Ray Spangler - Lucas TX, US
Stephen Arlon Meinser - Allen TX, US
Ronald Charles Roth - McKinney TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 19/00

US Classification:

700105, 700121

Abstract:

A manufacturing process including a controller method to generate a tool setting which includes a tool offset and a device offset. The controller method uses a device parameter measurement to update the tool offset and device offset. A tool weight and a device weight is assigned so that only one of the tool offset and device offset is significantly changed during the update. The process may be applied to semiconductor device manufacturing and particularly to integrated circuit fabrication.

US Patent:

8124321, Feb 28, 2012

Filed:

Aug 4, 2008

Appl. No.:

12/185197

Inventors:

Ronald Charles Roth - McKinney TX, US
Georgina Marie Park - Dallas TX, US
Rosemary Urmese Anthraper - Richardson TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G03F 7/28

US Classification:

430311, 430315, 430394

Abstract:

In a lithography process using an ultraviolet process, the applied ultraviolet resist can be removed by intentionally condensing the ultraviolet resist before removing the ultraviolet resist.

US Patent:

20080316579, Dec 25, 2008

Filed:

Aug 7, 2008

Appl. No.:

12/187856

Inventors:

Ronald Charles Roth - McKinney TX, US
Timothy Joseph Hogan - Allen TX, US
Lucius Sherwin - Plano TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G02B 26/00

US Classification:

359291

Abstract:

System and method for maximizing image quality by eliminating vias on a reflective surface. A preferred embodiment comprises depositing a first portion of a mirror surface over a support surface, applying a protective coating on the mirror surface, and then inverting the via. The preferred embodiment also comprises removing a portion of the inverted via and then depositing a second portion of the mirror surface. The remaining portion of the inverted via fills the via and provides a level surface for the depositing of the second portion of the mirror surface, reducing the amount of light scattered by the via.

US Patent:

20100068663, Mar 18, 2010

Filed:

Nov 18, 2009

Appl. No.:

12/621133

Inventors:

Erika Lee McFadden - Dallas TX, US
Ronald Charles Roth - McKinney TX, US
Lisa Ann Wesneski - The Colony TX, US

Assignee:

TEXAS INSTRUMENTS INCORPORATED - Dallas TX

International Classification:

G03F 7/20

US Classification:

430432

Abstract:

Method for removing contaminants from a surface during semiconductor fabrication. A preferred embodiment comprises developing a resist layer on a top surface of a semiconductor substrate, curing the developed resist layer, and cleaning the developed resist layer with a developer solution to remove contaminants. The cleaning makes use of the same developer solution used to develop the resist layer, so the cleaning makes use of a process that already exists and requires no additional investment to implement, while the curing stabilizes the developed resist layer so that the cleaning does not damage the developed resist layer.

US Patent:

20150103391, Apr 16, 2015

Filed:

Dec 17, 2013

Appl. No.:

14/109529

Inventors:

- Dallas TX, US
Jose Antonio Martinez - Murphy TX, US
Ronald Charles Roth - McKinney TX, US
Sean Christopher O'Brien - Dallas TX, US

International Classification:

G02B 26/08

US Classification:

359291, 216 24

Abstract:

A microelectromechanical (MEMS) device has a movable member supported above a substrate on a via support. The member and via support are fabricated integrally from first and second member forming layers. A first member forming layer forms a lower part of the member and supporting structure for the via support. First and second fill layers are deposited and patterned to form a plug that fills an inner cavity opening in the via structure. The plug is planarized to a planar part of the first member forming layer, and a second member forming layer is deposited over the first member forming layer and the planarized plug to form an upper part of the member. In an example micromirror device, metal layers define a movable mirror member supported on a via support which has a cavity filled by BARC layers. The BARC layers are planarized to a planar portion of a first metal layer and a second metal layer is formed over the first metal layer planar portion and planarized BARC layer plug.