Rosemary Y Gettle

US Patent:

53669290, Nov 22, 1994

Filed:

May 28, 1993

Appl. No.:

8/068900

Inventors:

James M. Cleeves - Redwood City CA
Changhae Park - Santa Clara CA
Rosemary Gettle - San Jose CA

Assignee:

Cypress Semiconductor Corp. - San Jose CA

International Classification:

H01L 2144

US Classification:

437195

Abstract:

A process for filling vias formed in a dielectric layer is disclosed. First, a via is formed in a dielectric layer, exposing an underlying metallization layer having a seed layer thereon. A sputter etch is performed which removes a portion of the seed layer, including an oxidized surface layer. The material thus etched from the seed layer first seals the sidewall of via, preventing outgassing from occurring. The continued redeposition of the seed layer on the sidewall provides a nucleation site for selective deposition of a via fill material. Following the sputter etch, selective deposition of the via fill is performed. Since the deposition occurs from the sidewalls as well as on the bottom of the via, all vias become substantially filled at the same time.