Roy Arthur Green

US Patent:

20010000947, May 10, 2001

Filed:

Dec 22, 2000

Appl. No.:

09/748519

Inventors:

Mark Swart - Anaheim Hills CA, US
Charles Johnston - Walnut CA, US
Gordon Vinther - Pasadena CA, US
Steve Sargeant - Los Alimitos CA, US
Roy Green - Chandler AZ, US

Assignee:

Delaware Capital Formation, Inc.

International Classification:

G01R031/02

US Classification:

324/755000

Abstract:

A test socket for an integrated circuit package having an upper housing and a lower housing secured to the top and bottom surfaces, respectively, of a load board. The upper housing having a cavity for receipt of the integrated circuit package and including a hole in the base of the upper housing to allow a plurality of solid socket plungers to contact test sites on the integrated circuit package. The socket plungers are positioned within a plurality of channels formed in the lower housing and extend through a plurality of holes in the load board to contact the test sites. A plurality of springs are positioned in the channels of the lower housing below the socket plungers to provide a spring force to bias the socket plungers upwardly toward the integrated circuit package. A nonconductive pushrod is positioned between the spring and a beveled edge of the plunger and a nonconductive cap is positioned above the load board for high frequency test signals. For closely spaced test sites a thinner daughter board is electrically connected to the load board through a hole in the load board. The test socket is then positioned on the daughter board.

US Patent:

62046802, Mar 20, 2001

Filed:

Aug 25, 1998

Appl. No.:

9/139543

Inventors:

Mark A. Swart - Anaheim Hills CA
Charles J. Johnston - Walnut CA
Gordon A. Vinther - Pasadena CA
Steve B. Sargeant - Los Alimitos CA
Roy W. Green - Chandler AZ

Assignee:

Delaware Capital Formation, Inc. - Wilmington DE

International Classification:

G01R 3102
G01R 1073

US Classification:

324761

Abstract:

A test socket for an integrated circuit package having an upper housing and a lower housing secured to the top and bottom surfaces, respectively, of a load board. The upper housing having a cavity for receipt of the integrated circuit package and including a hole in the base of the upper housing to allow a plurality of solid socket plungers to contact test sites on the integrated circuit package. The socket plungers are positioned within a plurality of channels formed in the lower housing and extend through a plurality of holes in the load board to contact the test sites. A plurality of springs are positioned in the channels of the lower housing below the socket plungers to provide a spring force to bias the socket plungers upwardly toward the integrated circuit package. A nonconductive pushrod is positioned between the spring and a beveled edge of the plunger and a nonconductive cap is positioned above the load board for high frequency test signals. For closely spaced test sites a thinner daughter board is electrically connected to the load board through a hole in the load board.