Roy E Jones

US Patent:

20030006837, Jan 9, 2003

Filed:

Jul 6, 2001

Appl. No.:

09/900396

Inventors:

Michael Score - Richardson TX, US
Paras Dagli - Richardson TX, US
Roy Jones - Plano TX, US
Wayne Chen - Plano TX, US

International Classification:

H03F003/38

US Classification:

330/010000

Abstract:

A ternary modulation scheme for filterless switching amplifiers with reduced EMI reduces the common mode component of the signal by allowing only one state with zero differential voltage across the load to exist. The ternary modulation scheme is more efficient than the quaternary modulation scheme when applied to class-D filterless switching amplifiers since the gates of the power MOSFETs are being charged and discharged at only a small duty cycle instead of 50% duty cycle.

US Patent:

20070024341, Feb 1, 2007

Filed:

Jul 27, 2005

Appl. No.:

11/190718

Inventors:

Patrick Muggler - Dallas TX, US
David Baldwin - Allen TX, US
Roy Jones - Plano TX, US

International Classification:

G05F 1/00

US Classification:

327520000

Abstract:

An apparatus for regulating a switching device that couples an output locus with one of a first voltage locus and a second voltage locus in response to a driver unit includes: a voltage feedback unit coupling the driver unit with at least one of the first voltage locus and the second voltage locus. The feedback unit provides a voltage feedback signal to the driver unit. The driver unit responds to the voltage feedback signal to affect the coupling by the switching device.

US Patent:

20070139121, Jun 21, 2007

Filed:

Dec 21, 2005

Appl. No.:

11/314563

Inventors:

David Baldwin - Allen TX, US
Russell Kinder - Plano TX, US
Patrick Muggler - Dallas TX, US
Roy Jones - Plano TX, US

International Classification:

H03F 3/04

US Classification:

330297000

Abstract:

A power converter receiving a single-sided supply which is ground-terminated and providing a positive supply and a regulated negative supply that is optimized to the expected output range of a class AB amplifier, as well as providing a symmetric positive supply having excellent efficiency. The converter finds application as a compact converter to power an audio amplifier driving an audio device which is ground terminated, such as a speaker.

US Patent:

20080130331, Jun 5, 2008

Filed:

Nov 16, 2007

Appl. No.:

11/941789

Inventors:

David John Baldwin - Allen TX, US
Russell Max Kinder - Plano TX, US
Patrick Muggler - Garland TX, US
Roy Clifton Jones - Plano TX, US

Assignee:

TEXAS INSTRUMENTS INCORPORATED - Dallas TX

International Classification:

H02M 3/158

US Classification:

363 80

Abstract:

A power converter receiving a single-sided supply which is ground-terminated and providing a regulated positive supply and a regulated negative supply that is optimized to the expected output range of a class AB amplifier, as well as providing excellent efficiency. The converter finds application as a compact converter to power an audio amplifier driving an audio device which is ground terminated, such as a speaker.

US Patent:

51191628, Jun 2, 1992

Filed:

Dec 19, 1989

Appl. No.:

7/454811

Inventors:

James R. Todd - Plano TX
David R. Cotton - Plano TX
Taylor R. Efland - Richardson TX
John K. Lee - Dallas TX
Roy C. Jones - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 2702

US Classification:

357 43

Abstract:

Methods and circuits of integrated DMOS, CMOS, NPN, and PNP devices include self-aligned DMOS (411) with increased breakdown voltage and ruggedness for recovery from transients including additional Zener diodes (402/474).

US Patent:

56043694, Feb 18, 1997

Filed:

Mar 1, 1995

Appl. No.:

8/397004

Inventors:

Charvaka Duvvury - Plano TX
Roy C. Jones - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 2362

US Classification:

257360

Abstract:

A protection device, circuit, and a method of forming the same. A field oxide drain extended nMOS (FODENMOS) transistor (10) is located in an epitaxial region (16). The FODENMOS transistor (10) comprises a field oxide region (36a) that extends from the source diffused regions (22) to over a portion of the extended drain region (20). A drain diffused region (24) is located within the extended drain region (20). A gate electrode (40) may be located above the field oxide region (36a) if desired. Accordingly, there is no thin oxide interface between the gate electrode (40) and the extended drain region (20) that can lead to low ESD protection.

US Patent:

6177829, Jan 23, 2001

Filed:

Nov 19, 1998

Appl. No.:

9/196335

Inventors:

Roy Clifton Jones - Dallas TX
Wayne T. Chen - Plano TX
David Cotton - Plano TX
Baoson Nguyen - Plano TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G05F 302

US Classification:

327536

Abstract:

A charge pump uses switching transistors including a PMOS transistor (P1), a first transistor (N1), and a second transistor (N2) instead of diodes (D1, D2) to control the transfer of charge from a pump capacitor (14) to a storage capacitor (20). The voltage (60) at the storage capacitor (20) is applied to a level shifter (13) and to the source of the PMOS transistor (P1) which, in turn, biases the first transistor (N1) during low state of an oscillating waveform (30B). A supply rail (140) charges the pump capacitor (14) when the first transistor (N1) is in its active region during the low state of the oscillating waveform (30B) and turns OFF during the high state of the waveform (30B) causing the charge on the pump capacitor (14) to be transferred to the storage capacitor (20). The level shifter (13) is used to synchronize the oscillating waveform (30B) so that no charge is lost from the pump capacitor (14) back to the supply and minimal charge is conducted through a parasitic diode (55).

US Patent:

56565178, Aug 12, 1997

Filed:

Jun 7, 1995

Appl. No.:

8/473837

Inventors:

Taylor R. Efland - Richardson TX
Roy C. Jones - Dallas TX
Oh-Kyong Kwon - Seoul, KR
Michael C. Smayling - Missouri City TX
Satwinder Malhi - Garland TX
Wai Tung Ng - Ontario, CA

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H01L 21265

US Classification:

438273

Abstract:

A source cell having reduced area and reduced polysilicon window width requirements for use as the source region in a DMOS transistor is disclosed, comprising: a source region of semiconductor material disposed on a semiconductor substrate; a plurality of backgate contact segments of predetermined size and separated by predetermined distances; and a plurality of source contact windows alternating with the backgate contact segments so that a narrow source contact region is formed of alternating source contact and backgate contact material. A DMOS transistor embodying the source region including the backgate contact segments and windowed source contacting regions of the invention is disclosed. An integrated circuit providing an array of DMOS transistors having the improved source regions of the invention is disclosed. Other devices, systems and methods are also disclosed.

Address:

1203 Niblick Cir, Dallas, TX 75232

Phone:

(214)3756247

VIN:

1G6DW677870121281

Make:

CADILLAC

Model:

STS

Year:

2007