Samson Y Wong

US Patent:

7293221, Nov 6, 2007

Filed:

Jan 27, 2004

Appl. No.:

10/766743

Inventors:

Samson S. Wong - San Jose CA, US
Kandasamy Aravinthan - Daly City CA, US
Gideon N. Levinsky - Austin TX, US
Shahar Dor - Austin TX, US
Richard T. Van - Milpitas CA, US
Jiejun Lu - Santa Clara CA, US

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G11C 29/00

US Classification:

714768

Abstract:

A method for detecting transfer errors in an address bus is provided. In this method, a first address parity is generated using a memory address. Next, at least two data error-correction-code (ECC) check bits are scrambled using the first address parity. Subsequently, the data ECC check bits are written to a memory and the data ECC check bits enable detection of transfer errors in the address bus. A system for detecting transfer errors in an address bus is also described.

US Patent:

6094711, Jul 25, 2000

Filed:

Jun 17, 1997

Appl. No.:

8/877455

Inventors:

Samson Wong - Santa Clara CA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

G06F 1200
G06F 1314

US Classification:

711169

Abstract:

The pin count of a processor is substantially reduced while effectively maintaining processor performance by using a staging register to receive and store a first data segment from a bus. A second data segment is received from the bus in a subsequent bus cycle and loaded into a cache. A steering circuit dynamically selects the transfer of the first or the second segment to a processor core, and orders positioning of the first and second data segments into the cache. In some embodiments, the cache is a first level cache and a second level cache is inserted between the bus and the processor. In these embodiments, the processor includes a bypassing circuit for designating the ordering of bus data in response to a memory access that misses the first level cache and hits the second level cache.

US Patent:

20220188319, Jun 16, 2022

Filed:

Dec 11, 2020

Appl. No.:

17/118993

Inventors:

- San Francisco CA, US
Fabiha Johura Hannan - San Francisco CA, US
Akanksha Grover - Pacifica CA, US
Priyank Saxena - Danville CA, US
Amit Sharma - Vancouver, CA
Samson Richard Wong - San Jose CA, US
Dinesh Rohra - Dublin CA, US
Kapil Agarwal - Fremont CA, US
Katharine Grace Bowerman - Reston VA, US

International Classification:

G06F 16/2457
G06F 16/23
G06Q 30/02
G06F 40/35
G06F 16/683
H04M 3/51
G06N 20/00

Abstract:

Leveraging time-based comments on communications recordings is described. A system determines a comment time for a communications recording associated with a database record. The system receives a comment for the communications recording and generates a comment thread which includes the comment. If a media player is displaying a player control that is associated with the communications recording, the system causes the comment time and the comment thread and/or a comment thread indicator to be displayed with the player control that is displayed by the media player. The system initiates generation of a feed item, which includes the comment and references the communications recording, thereby causing the output of the feed item via an information feed associated with the database record to any system user associated with the database record.