Ramarathnam Venkatesan - Redmond WA, US Saurabh Sinha - Seattle WA, US
Assignee:
Microsoft Corporation - Redmond WA
International Classification:
G06F 9/44 G06F 7/00
US Classification:
717168, 717144, 717157, 707 6
Abstract:
Implementations of this invention provide a technology for generating a minimum delta between at least two program binaries. An implementation of this invention is given a source program (S) in a binary format and a target program (T) in a binary form. It constructs control flow graphs (CFGs) of each. It matches common blocks of the S's CFGs and T's CFGs. The blocks are matched based upon their content and their local neighborhoods. In addition, the register renaming problems is solved so that blocks can be fairly compared. This implementation of this invention produces an intermediate output, which is the content of unmatched blocks. It generates a set of edge edit operations for merging the unmatched blocks into S. The combination of the unmatched blocks and the edit operations is the delta. To patch S to produce a reconstructed copy of T, the delta is merged with S.
Integrity Ordainment And Ascertainment Of Computer-Executable Instructions With Consideration For Execution Context
Saurabh Sinha - Seattle WA, US Mariusz H. Jakubowski - Bellevue WA, US Ramarathnam Venkatesan - Redmond WA, US Yuqun Chen - Bellevue WA, US Matthew Cary - Seattle WA, US Ruoming Pang - Shanghai, CN
An implementation of a technology, described herein, for facilitating the protection computer-executable instructions, such as software. At least one implementation, described herein, may generate integrity signatures of one or more program modules—which are sets of computer-executable instructions—based upon a trace of activity during execution of such modules and/or near-replicas of such modules. With at least one implementation, described herein, the execution context of an execution instance of a program module is considered when generating the integrity signatures. With at least one implementation, described herein, a determination may be made about whether a module is unaltered by comparing integrity signatures. This abstract itself is not intended to limit the scope of this patent. The scope of the present invention is pointed out in the appending claims.
Integrity Ordainment And Ascertainment Of Computer-Executable Instructions
Saurabh Sinha - Seattle WA, US Mariusz H. Jakubowski - Bellevue WA, US Ramarathnam Venkatesan - Redmond WA, US Yuqun Chen - Bellevue WA, US Matthew Cary - Seattle WA, US Ruoming Pang - Shanghai, CN
Assignee:
Microsoft Corporation - Redmond WA
International Classification:
G06F 11/30 G06F 12/14
US Classification:
713187, 713176, 713194, 726 24
Abstract:
An implementation of a technology, described herein, for facilitating the protection computer-executable instructions, such as software. At least one implementation, described herein, may generate integrity signatures of multiple sets of computer-executable instructions based upon the output trace and/or an execution trace of such sets. With at least one implementation, described herein, a determination may be made about whether two or more of such sets are unaltered duplicates by comparing integrity signatures of such sets. This abstract itself is not intended to limit the scope of this patent. The scope of the present invention is pointed out in the appending claims.
Integrity Ordainment And Ascertainment Of Computer-Executable Instructions With Consideration For Execution Context
Saurabh Sinha - Seattle WA, US Mariusz H. Jakubowski - Bellevue WA, US Ramarathnam Venkatesan - Redmond WA, US Yuqun Chen - Bellevue WA, US Matthew Cary - Seattle WA, US Ruoming Pang - Shanghai, CN
Assignee:
Microsoft Corporation - Redmond WA
International Classification:
G06F 12/14 H04L 1/00 G08B 23/00
US Classification:
726 23, 713176, 717135
Abstract:
An implementation of a technology, described herein, for facilitating the protection of computer-executable instructions, such as software. At least one implementation, described herein, may generate integrity signatures of one or more program modules—which are sets of computer-executable instructions—based upon a trace of activity during execution of such modules and/or near-replicas of such modules. With at least one implementation, described herein, the execution context of an execution instance of a program module is considered when generating the integrity signatures. With at least one implementation, described herein, a determination may be made about whether a module is unaltered by comparing integrity signatures. This abstract itself is not intended to limit the scope of this patent. The scope of the present invention is pointed out in the appending claims.
Integrity Ordainment And Ascertainment Of Computer-Executable Instructions With Consideration For Execution Context
Saurabh Sinha - Seattle WA, US Mariusz H. Jakubowski - Bellevue WA, US Ramarathnam Venkatesan - Redmond WA, US Yuqun Chen - Bellevue WA, US Matthew Cary - Seattle WA, US Ruoming Pang - Shanghai, CN
Assignee:
Microsoft Corporation - Redmond WA
International Classification:
G06F 12/14 H04L 1/00 G08B 23/00
US Classification:
726 23, 713176, 717135
Abstract:
An implementation of a technology, described herein, for facilitating the protection of computer-executable instructions, such as software. At least one implementation, described herein, may generate integrity signatures of one or more program modules—which are sets of computer-executable instructions—based upon a trace of activity during execution of such modules and/or near-replicas of such modules. With at least one implementation, described herein, the execution context of an execution instance of a program module is considered when generating the integrity signatures. With at least one implementation, described herein, a determination may be made about whether a module is unaltered by comparing integrity signatures. This abstract itself is not intended to limit the scope of this patent. The scope of the present invention is pointed out in the appending claims.
Ramarathnam Venkatesan - Redmond WA, US Saurabh Sinha - Seattle WA, US
Assignee:
Microsoft Corporation - Redmond WA
International Classification:
G06F 9/44
US Classification:
717168, 717132, 717144, 717156
Abstract:
Implementations provide a technology for generating a minimum delta between at least two program binaries. An implementation is given a source program (S) in a binary format and a target program (T) in a binary form. It constructs control flow graphs (CFGs) of each. It matches common blocks of the S's CFGs and T's CFGs. The blocks are matched based upon their content and their local neighborhoods. In addition, the register renaming problems is solved so that blocks can be fairly compared. This implementation produces an intermediate output, which is the content of unmatched blocks. It generates a set of edge edit operations for merging the unmatched blocks into S. The combination of the unmatched blocks and the edit operations is the delta. To patch S to produce a reconstructed copy of T, the delta is merged with S.
Ramarathnam Venkatesan - Redmond WA, US Saurabh Sinha - Seattle WA, US
Assignee:
Microsoft Corporation - Redmond WA
International Classification:
G06F 9/44
US Classification:
717168, 717132, 717144, 717156
Abstract:
Implementations provide a technology for generating a minimum delta between at least two program binaries. An implementation is given a source program (S) in a binary format and a target program (T) in a binary form. It constructs control flow graphs (CFGs) of each. It matches common blocks of the S's CFGs and T's CFGs. The blocks are matched based upon their content and their local neighborhoods. In addition, the register renaming problems is solved so that blocks can be fairly compared. This implementation produces an intermediate output, which is the content of unmatched blocks. It generates a set of edge edit operations for merging the unmatched blocks into S. The combination of the unmatched blocks and the edit operations is the delta. To patch S to produce a reconstructed copy of T, the delta is merged with S.
Ramarathnam Venkatesan - Redmond WA, US Saurabh Sinha - Seattle WA, US
Assignee:
Microsoft Corporation - Redmond WA
International Classification:
G06F 17/30
US Classification:
707102
Abstract:
Implementations of this invention provide a technology for generating a minimum delta between at least two program binaries. An implementation of this invention is given a source program (S) in a binary format and a target program (T) in a binary form. It constructs control flow graphs (CFGs) of each. It matches common blocks of the S's CFGs and T's CFGs. The blocks are matched based upon their content and their local neighborhoods. In addition, the register renaming problems is solved so that blocks can be fairly compared. This implementation of this invention produces an intermediate output, which is the content of unmatched blocks. It generates a set of edge edit operations for merging the unmatched blocks into S. The combination of the unmatched blocks and the edit operations is the delta. To patch S to produce a reconstructed copy of T, the delta is merged with S.
Duke University Medical Center Neurology 330 Trent Dr, Durham, NC 27710 (919)6813448 (phone), (919)6848955 (fax)
Duke University Affil PhysicianDuke University Medical Center Neurology 200 Trent Dr Clinic 1L, Durham, NC 27710 (919)6687600 (phone), (919)6811609 (fax)
Education:
Medical School Baylor College of Medicine Graduated: 1999
Dr. Sinha graduated from the Baylor College of Medicine in 1999. He works in Durham, NC and 1 other location and specializes in Neurophysiology, Clinical and Neurology. Dr. Sinha is affiliated with Duke University Hospital.
Investment analyst covering Indian equity market for over 10 years at largest Indian and global investment management firms
B Tech(Mining), MBA, CFA
Googleplus
Saurabh Sinha
Lived:
Austin, TX Vadodara, Gujarat, India Rourkela, Orissa, India Tempe, AZ, US Austin, TX, US
Work:
ARM Inc. - Senior Design Engineer (2011)
Education:
Arizona State University - PhD, Electrical Engineering, National Institute of Technology, Rourkela - B.Tech Electronics and Instrumentation Engineering, Baroda High School - High School
Saurabh Sinha
Work:
IBM India - Technical Services Proffessional (7) Satyam Computer Services Ltd. - Software Engg (16-5)
Education:
Technocrats Institute of technology - Computer Science and Engineering
Saurabh Sinha
Work:
Unitus Software Solution - Senior Analyst
Education:
Symbiosis Institute of Business Management - Marketing
Saurabh Sinha
Work:
Student - Aarya (2010-2012)
Saurabh Sinha
Education:
Birla Institute of Technology & Science, Pilani - Goa - Engineering
Saurabh Sinha
Education:
Holy cross senior secondary school - Science
Tagline:
I may not be the best, but certainly i am tougher than the rest!!!
Saurabh Sinha
Education:
RTM NAGPUR UNIVERSITY - Electronics Engineering
Saurabh Sinha
Work:
The Times Of India
News
New Informatics Tool Makes the Most of Genomic Data
"There was no tool that would exploit all of these together," said professor of Computer Science and Willett Faculty Scholar Saurabh Sinha, who co-directs the BD2K Center. "From the question came the data . . . then came our part, what do you do with it?"
deferred its plan to fly the super jumbo jet Airbus A380 to India after Mumbai International Airport Pvt. Ltd. (MIAL) failed to allot the 2 am time slot it wanted for its proposed operations, stated a TOI report by Saurabh Sinha. Lufthansa wanted the 2 am slot, which MIAL has already given to Emirates.