A function generator for use in a synchro to digital (S to D) converter in which successive approximations of the digital output are made by switching between two chains of cascade connected operational amplifiers so that, as one chain is incremented to decrease the error signal appearing at the output of the chain, the other chain is coupled to control the error reduction operation until the aforementioned switching is completed, at which time the chains reverse roles.
Apparatus For Reducing The Scale Factor Variation For Digital Resolver Type Converters And The Like
In a digital-to-resolver type converter for generating sine and cosine functions over at least a predetermined angular range wherein variation of the scale factor from absolute value is remarkably improved by modification of the reference input wherein the sum of the sine and cosine signals are fed back in a positive sense, providing more than a 30 fold improvement in reduction of scale factor variation in one preferred embodiment.