Siu W Cheung

US Patent:

20230115690, Apr 13, 2023

Filed:

Dec 16, 2021

Appl. No.:

17/644679

Inventors:

- San Jose CA, US
Kevin WANG - Fremont CA, US
Hao HUANG - San Jose CA, US
John Michael MILLER - Ottawa, CA
Siu Kwan CHEUNG - San Jose CA, US
Lijun ZHU - Pleasanton CA, US

International Classification:

H01S 5/42
H01S 5/042
H01S 5/183
H01S 5/026

Abstract:

An optical assembly includes an integrated circuit (IC) driver chip; an optical subassembly disposed on the IC driver chip that includes: a vertical cavity surface emitting laser (VCSEL) device, an optical element disposed above a top surface of the VCSEL device, and two or more attachment structures disposed between the VCSEL device and the optical element; and two or more additional attachment structures disposed between the IC driver chip and the optical subassembly. The VCSEL device includes: a cathode contact disposed on the top surface of the VCSEL device, and an anode contact disposed on the top surface of the VCSEL device. The optical element includes two or more conductive traces on a bottom surface of the optical element. The two or more attachment structures are disposed between the two or more conductive traces of the optical element, and the cathode contact and the anode contact of the VCSEL device.

US Patent:

20230027279, Jan 26, 2023

Filed:

Sep 29, 2021

Appl. No.:

17/449386

Inventors:

- San Jose CA, US
Kevin WANG - Fremont CA, US
Hao HUANG - San Jose CA, US
John Michael MILLER - Ottawa, Ontario, CA
Siu Kwan CHEUNG - San Jose CA, US
Lijun ZHU - Pleasanton CA, US

International Classification:

H01S 5/183
H01S 5/42
H01S 5/024
H01S 5/026

Abstract:

In some implementations, an optical assembly includes a substrate that includes a thermally conductive core, an IC driver chip that is disposed on a first surface of the substrate, and a VCSEL device that includes an electrically insulated surface that is disposed on the thermally conductive core of the substrate within a cavity formed in the second surface of the substrate. The VCSEL device includes a cathode contact disposed on a surface of the VCSEL device and an anode contact disposed on the surface of the VCSEL device. The VCSEL device includes a plurality of emitters and a microlens component that is disposed over the plurality of emitters on the surface of the VCSEL device.

US Patent:

20210325451, Oct 21, 2021

Filed:

Jun 30, 2020

Appl. No.:

16/917124

Inventors:

- San Jose CA, US
Lucas MORALES - San Francisco CA, US
Raman SRINIVASAN - Fremont CA, US
Sean BURNS - Menlo Park CA, US
Siu Kwan CHEUNG - San Jose CA, US
Tian SHI - Fremont CA, US
Tao LI - Fremont CA, US

International Classification:

G01R 31/28

Abstract:

A wafer testing system may comprise a chuck, a wafer carrier, a cathode plate, and a probe card. The chuck may be configured to hold the wafer carrier. The wafer carrier may be configured to hold a wafer on a surface of the wafer carrier, wherein the surface of the wafer carrier comprises one or more contact features protruding from the surface of the wafer carrier. The cathode plate may be configured to provide an electrical connection between the wafer carrier and the probe card, wherein a portion of a surface of the cathode plate is configured to be disposed on the one or more contact features of the wafer carrier. The probe card may be configured to test, using one or more probes associated with the probe card, the wafer when the wafer is on the surface of the wafer carrier.