Srikanth A Raghavan

US Patent:

20140030893, Jan 30, 2014

Filed:

Jul 24, 2012

Appl. No.:

13/556541

Inventors:

Ming-Shu KUO - San Ramon CA, US
Siyi LI - Fremont CA, US
Monica TITUS - Sunnyvale CA, US
Srikanth RAGHAVAN - Fremont CA, US
Tae Won KIM - Dublin CA, US
Gowri KAMARTHY - Pleasanton CA, US

Assignee:

LAM RESEARCH CORPORATION - Fremont CA

International Classification:

H01L 21/302

US Classification:

438703, 257E21214

Abstract:

A method for etching with CD reduction, an etch layer disposed below a silicon containing mask layer under a patterned organic mask with features with a first CD. Features are opened in the silicon containing mask layer using the patterned organic mask, comprising providing an opening gas with an etchant component and polymerizing component, forming the opening gas into a plasma, and providing a pulsed bias with a pulse frequency between 10 Hz and 1 kHz, which etches features through the silicon containing mask layer with a second CD, which is less than half the first CD, forming a pattern in the silicon containing mask layer. The pattern of the silicon containing mask layer is transferred to the etch layer.

US Patent:

20140051256, Feb 20, 2014

Filed:

Aug 15, 2012

Appl. No.:

13/586793

Inventors:

Qinghua ZHONG - Fremont CA, US
Siyi LI - Fremont CA, US
Armen KIRAKOSIAN - Walnut Creek CA, US
Yifeng ZHOU - Fremont CA, US
Ramkumar VINNAKOTA - Sunnyvale CA, US
Ming-Shu KUO - San Ramon CA, US
Srikanth RAGHAVAN - Fremont CA, US
Yoshie KIMURA - Castro Valley CA, US
Tae Won KIM - Dublin CA, US
Gowri KAMARTHY - Pleasanton CA, US

Assignee:

LAM RESEARCH CORPORATION - Fremont CA

International Classification:

H01L 21/3065

US Classification:

438717, 438723, 257E21218

Abstract:

A method for etching a dielectric layer disposed below a patterned organic mask with features, with hardmasks at bottoms of some of the organic mask features is provided. An etch gas is provided. The etch gas is formed into a plasma. A bias RF with a frequency between 2 and 60 MHz is provided that provides pulsed bias with a pulse frequency between 10 Hz and 1 kHz wherein the pulsed bias selectively deposits on top of the organic mask with respect to the dielectric layer.

US Patent:

20140195853, Jul 10, 2014

Filed:

Jan 9, 2013

Appl. No.:

13/737469

Inventors:

- Redmond WA, US
Srikanth Raghavan - Sammamish WA, US
Ajay Mani - Woodinville WA, US
Saad Syed - Redmond WA, US

Assignee:

MICROSOFT CORPORATION - Redmond WA

International Classification:

G06F 11/26

US Classification:

714 33

Abstract:

Embodiments are directed to establishing a model for testing cloud components and to preventing cascading failures in cloud components. In one scenario, a computer system models identified cloud components (including cloud hardware components and/or cloud software components) as health entities. Each health entity is configured to provide state information about the cloud component. The computer system establishes declarative safety conditions which declaratively describe cloud computing conditions that are to be maintained at the identified cloud components. The computer system then tests against the declarative safety conditions to determine which cloud components are or are becoming problematic. Upon determining that an error has occurred, the computer system notifies users of the error and the component at which the error occurred. Guarded interfaces are established to ensure that actions taken to fix the error do not cause further failures.

US Patent:

20140195861, Jul 10, 2014

Filed:

Jan 9, 2013

Appl. No.:

13/737430

Inventors:

- Redmond WA, US
Srikanth Raghavan - Sammamish WA, US
Ajay Mani - Woodinville WA, US
Saad Syed - Redmond WA, US

Assignee:

MICROSOFT CORPORATION - Redmond WA

International Classification:

G06F 11/34

US Classification:

714 472

Abstract:

Embodiments are directed to implementing rate controls to limit faults detected by timeout and to learning and adjusting an optimal timeout value. In one scenario, a computer system identifies cloud components that have the potential to fail within a time frame that is specified by a timeout value. The computer system establishes a number of components that are allowed to fail during the time frame specified by the timeout value and further determines that the number of component failures within the time frame specified by the timeout value has exceeded the established number of components that are allowed to fail. In response, the computer system increases the timeout value by a specified amount of time to ensure that fewer than or equal to the established number of components fail within the time frame specified by the timeout value.

US Patent:

20140179106, Jun 26, 2014

Filed:

Dec 21, 2012

Appl. No.:

13/725848

Inventors:

- Fremont CA, US
Yifeng ZHOU - Fremont CA, US
Ming-Shu KUO - San Ramon CA, US
Armen KIRAKOSIAN - Walnut Creek CA, US
Siyi LI - Fremont CA, US
Srikanth RAGHAVAN - Fremont CA, US
Ramkumar VINNAKOTA - Sunnyvale CA, US
Yoshie KIMURA - Castro Valley CA, US
Tae Won KIM - Dublin CA, US
Gowri KAMARTHY - Pleasanton CA, US

Assignee:

Lam Research Corporation - Fremont CA

International Classification:

H01L 21/306

US Classification:

438689

Abstract:

A method for forming devices in an oxide layer over a substrate, wherein a metal containing layer forms at least either an etch stop layer below the oxide layer or a patterned mask above the oxide layer, wherein a patterned organic mask is above the oxide layer is provided. The substrate is placed in a plasma processing chamber. The oxide layer is etched through the patterned organic mask, wherein metal residue from the metal containing layer forms metal residue on sidewalls of the oxide layer. The patterned organic mask is stripped. The metal residue is cleaned by the steps comprising providing a cleaning gas comprising BCland forming a plasma from the cleaning gas. The substrate is removed from the plasma processing chamber.