Stephen G Burnham

US Patent:

45243182, Jun 18, 1985

Filed:

May 25, 1984

Appl. No.:

6/614337

Inventors:

Stephen R. Burnham - Tucson AZ
Paul M. Henry - Tucson AZ

Assignee:

Burr-Brown Corporation - Tucson AZ

International Classification:

G05F 320

US Classification:

323313

Abstract:

A band gap voltage reference circuit includes first and second NPN transistors coupled as differential pair having ratioed emitters, to produce an offset voltage, and third and fourth emitter-coupled PNP transistors connected as a current mirror to function as load devices for the first and second transistors. The emitters of the third and fourth transistors are coupled to a current source and also to a fifth PNP emitter follower transistor which drives the base of a sixth emitter follower transistor connected to the collector of a seventh transistor, the emitter of which is connected to a series string including first and second resistors. The emitter of the seventh transistor is coupled to the base of the first transistor and the junction between the first and second resistors is coupled to the base of the second transistor. The emitter of the sixth transistor is coupled to series connected third and fourth resistors, the junction of which is coupled to the base of the seventh transistor. The ratio of the first and second resistors is adjusted to cause a band gap voltage produced on the base of the seventh transistor to have a very low temperature coefficient.

US Patent:

46599797, Apr 21, 1987

Filed:

Nov 27, 1985

Appl. No.:

6/802709

Inventors:

Stephen R. Burnham - Tucson AZ
Stephen F. Ulbrich - Manitou Springs CO

Assignee:

Burr-Brown Corporation - Tucson AZ

International Classification:

G05F 308

US Classification:

323312

Abstract:

A high voltage constant current source circuit includes first transistor biased as a constant current source and a second transistor connected in series with the first transistor. The second transistor has a punch-through voltage that is substantially less than any breakdown voltage of the second transistor. The emitter of the second transistor is connected to the collector of the first transistor. The collector of the second transistor supplies the constant current, provides an increased high output impedance, and allows low voltage operation if the collector-to-emitter voltage of the second transistor is less than its punch-through voltage. If its punch-through voltage is exceeded, that punch-through voltage adds to the collector-to-emitter breakdown voltage of the first transistor, allowing high voltage operation.

US Patent:

47420219, May 3, 1988

Filed:

Apr 14, 1987

Appl. No.:

7/038012

Inventors:

Stephen R. Burnham - Tucson AZ
William J. Lillis - Tucson AZ

Assignee:

Burr-Brown Corporation - Tucson AZ

International Classification:

H01L 21383

US Classification:

437149

Abstract:

A subsurface zener diode is formed in an N. sup. - epitaxial region formed on a P type substrate. The N. sup. - epitaxial region is isolated by a P. sup. + isolation region. An N. sup. + buried layer region is disposed between a portion of the N. sup. - epitaxial region and the P type substrate. A first P. sup. + region is formed in the middle of the N. sup. - epitaxial region at the same time as the P. sup. + isolation regions. Second and third adjacent P. sup. + regions also are formed in the N. sup. - epitaxial region adjacent to and slightly overlapping the first P. sup. + region, all three P. sup. + regions terminating at the N. sup. + buried layer. An N. sup. + region, formed during an emitter diffusion operation, has first and second opposed edges centered within the overlapping portions of the first, second, and third P. sup. + regions. Two other opposed edges of the N. sup. + region extend beyond the other edges of the first P. sup.

US Patent:

46834834, Jul 28, 1987

Filed:

May 5, 1986

Appl. No.:

6/859454

Inventors:

Stephen R. Burnham - Tucson AZ
William J. Lillis - Tucson AZ

Assignee:

Burr-Brown Corporation - Tucson AZ

International Classification:

H01L 2990

US Classification:

357 13

Abstract:

A subsurface zener diode is formed in an N. sup. - epitaxial region formed on a P type substrate. The N. sup. - epitaxial region is isolated by a P. sup. + isolation region. An N. sup. + buried layer region is disposed between a portion of the N. sup. - epitaxial region and the P type substrate. A first P. sup. + region is formed in the middle of the N. sup. - epitaxial region at the same time as the P. sup. + isolation regions. Second and third adjacent P. sup. + regions also are formed in the N. sup. - epitaxial region adjacent to and slightly overlapping the first P. sup. + region, all three P. sup. + regions terminating at the N. sup. + buried layer. An N. sup. + region, formed during an emitter diffusion operation, has first and second opposed edges centered within the overlapping portions of the first, second, and third P. sup. + regions. Two other opposed edges of the N. sup.