Stephen T Ippolito

US Patent:

7826045, Nov 2, 2010

Filed:

Jan 25, 2008

Appl. No.:

12/020157

Inventors:

Stephen Bradley Ippolito - Croton on Hudson NY, US
Darrell L. Miles - Wappingers Falls NY, US
Peilin Song - Lagrangeville NY, US
John D. Sylvestri - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01N 21/00

US Classification:

3562371

Abstract:

A method and structure for locating a fault in a semiconductor chip. The chip includes a substrate on a dielectric interconnect. A first electrical response image of the chip, which includes a spot representing the fault, is overlayed on a first reflection image for monochromatic light in an optical path from an optical microscope through a SIL/NAIL and into the chip. The index of refraction of the substrate exceeds that of the dielectric interconnect and is equal to that of the SIL/NAIL. A second electrical response image of the chip is overlayed on a second reflection image for the monochromatic light in an optical path in which an optical stop prevents all subcritical angular components of the monochromatic light from being incident on the SIL/NAIL. If the second electrical response image includes or does not include the spot, then the fault is in the substrate or the dielectric interconnect, respectively.

US Patent:

7961307, Jun 14, 2011

Filed:

Oct 26, 2010

Appl. No.:

12/911781

Inventors:

Stephen Bradley Ippolito - Croton on Hudson NY, US
Darrell L. Miles - Wappingers Falls NY, US
Peilin Song - Lagrangeville NY, US
John D. Sylvestri - Poughkeepsie NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01N 21/00

US Classification:

3562371

Abstract:

A structure for locating a fault in a semiconductor chip. The chip includes a substrate on a dielectric interconnect. A first electrical response image of the chip, which includes a spot representing the fault, is overlayed on a first reflection image for monochromatic light in an optical path from an optical microscope through a SIL/NAIL and into the chip. The index of refraction of the substrate exceeds that of the dielectric interconnect and is equal to that of the SIL/NAIL. A second electrical response image of the chip is overlayed on a second reflection image for the monochromatic light in an optical path in which an optical stop prevents all subcritical angular components of the monochromatic light from being incident on the SIL/NAIL. If the second electrical response image includes or does not include the spot, then the fault is in the substrate or the dielectric interconnect, respectively.

US Patent:

8248097, Aug 21, 2012

Filed:

Apr 2, 2009

Appl. No.:

12/417454

Inventors:

Stephen Bradley Ippolito - Ossining NY, US
Alan J. Weger - Mohegan Lake NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/02

US Classification:

32476205, 32475603

Abstract:

A semiconductor wafer resting on a contact element has a spatially distributed force applied to its frontside and an equal and opposing force applied to its backside. The contact element comprises a solid immersion lens (SIL), and has an area less than the area of the wafer, but no less than the larger of the area of an optical collection area and an electrical probe assembly. The equal and opposing forces cause the wafer to conform to the shape of the contact element. Measurements, including electrical testing, optical probing and wafer characterization are performed on the wafer.

US Patent:

20120217974, Aug 30, 2012

Filed:

May 3, 2012

Appl. No.:

13/462964

Inventors:

Stephen Bradley Ippolito - Yorktown Heights NY, US
Alan J. Weger - Yorktown Heights NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/00

US Classification:

324501, 32475016

Abstract:

A semiconductor wafer resting on a contact element has a spatially distributed force applied to its frontside and an equal and opposing force applied to its backside. The contact element comprises a solid immersion lens (SIL), and has an area less than the area of the wafer, but no less than the larger of the area of an optical collection area and an electrical probe assembly. The equal and opposing forces cause the wafer to conform to the shape of the contact element. Measurements, including electrical testing, optical probing and wafer characterization are performed on the wafer.