Stephen Joseph Wright

US Patent:

7567253, Jul 28, 2009

Filed:

Mar 31, 2006

Appl. No.:

11/395041

Inventors:

Jeremy de Souza - Redmond WA, US
Pravin K. Santiago - Issaquah WA, US
Stephen H. Wright - Bothell WA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06T 1/00
G06F 13/14
G06F 3/00

US Classification:

345522, 345520, 719322, 719323, 719324

Abstract:

Described is a technology including a mechanism that when activated, detects a call to a device independent bitmap. An appropriate mirror driver, such as one or more registered as an accessibility driver, may then be notified of the call. The mechanism may be activated upon creation or selection of the device independent bitmap, and may comprise a wrapper/driver that, from the perspective of the mirror driver, simulates a call to a device dependent bitmap. The notification may be performed by having the driver communicate a function call that emulates a drawing primitive to the mirror driver.

US Patent:

7570267, Aug 4, 2009

Filed:

Sep 3, 2004

Appl. No.:

10/934249

Inventors:

Amar Patel - Redmond WA, US
Charles N. Boyd - Woodinville WA, US
David R. Blythe - Kirkland WA, US
Jeff M. J. Noyle - Kirkland WA, US
Michael A. Toelle - Bellevue WA, US
Stephen Harry Wright - Bothell WA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06T 1/00
G06T 15/00

US Classification:

345522, 345506, 345619, 345426

Abstract:

An enhanced graphics pipeline is provided that enables common core hardware to perform as different components of the graphics pipeline, programmability of primitives including lines and triangles by a component in the pipeline, and a stream output before or simultaneously with the rendering a graphical display with the data in the pipeline. The programmer does not have to optimize the code, as the common core will balance the load of functions necessary and dynamically allocate those instructions on the common core hardware. The programmer may program primitives using algorithms to simplify all vertex calculations by substituting with topology made with lines and triangles. The programmer takes the calculated output data and can read it before or while it is being rendered. Thus, a programmer has greater flexibility in programming. By using the enhanced graphics pipeline, the programmer can optimize the usage of the hardware in the pipeline, program vertex, line or triangle topologies altogether rather than each vertex alone, and read any calculated data from memory where the pipeline can output the calculated information.

US Patent:

7619622, Nov 17, 2009

Filed:

Mar 31, 2006

Appl. No.:

11/395684

Inventors:

Jeremy de Souza - Redmond WA, US
Pravin K. Santiago - Issaquah WA, US
Stephen H. Wright - Bothell WA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06F 17/00
G06F 15/16
G06T 1/00
G09G 5/00
G06K 9/62
G06K 9/40
G06F 3/048

US Classification:

345418, 345581, 345502, 345522, 382224, 382254, 382260, 715781

Abstract:

Described is a filtering mechanism/process that selectively controls whether graphics primitives are provided to a given driver. For example, graphics primitives of an accessibility (e. g. , magnification) program may be excluded from being obtained by mirror drivers associated with the accessibility programs, so that the mirror drivers receive only the primitives of unmagnified windows. A registration mechanism allows a program to identify its window as being associated with a class of drivers for filtering, and the drivers may identify themselves as being of the class. By maintaining data that associates windows with a class of drivers, when graphics primitives associated with a registered window are received, a filtering operation be activated to determine which graphics primitives are provided to which driver or drivers. Filtering may be by exclusion to prevent certain primitives from being obtained by excluded drivers, or by inclusion whereby only included drivers receive certain primitives.

US Patent:

7671862, Mar 2, 2010

Filed:

Sep 3, 2004

Appl. No.:

10/934241

Inventors:

Amar Patel - Redmond WA, US
Charles N. Boyd - Woodinville WA, US
David R. Blythe - Kirkland WA, US
Jeff M. J. Noyle - Kirkland WA, US
Michael A. Toelle - Bellevue WA, US
Stephen Harry Wright - Bothell WA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06F 15/00
G06T 1/00
G06T 1/20

US Classification:

345501, 345502, 345503, 345504, 345505, 345506, 345613, 345581

Abstract:

An enhanced graphics pipeline is provided that enables common core hardware to perform as different components of the graphics pipeline, programmability of primitives including lines and triangles by a component in the pipeline, and a stream output before or simultaneously with the rendering a graphical display with the data in the pipeline. The programmer does not have to optimize the code, as the common core will balance the load of functions necessary and dynamically allocate those instructions on the common core hardware. The programmer may program primitives using algorithms to simplify all vertex calculations by substituting with topology made with lines and triangles. The programmer takes the calculated output data and can read it before or while it is being rendered. Thus, a programmer has greater flexibility in programming. By using the enhanced graphics pipeline, the programmer can optimize the usage of the hardware in the pipeline, program vertex, line or triangle topologies altogether rather than each vertex alone, and read any calculated data from memory where the pipeline can output the calculated information.

US Patent:

7689926, Mar 30, 2010

Filed:

Mar 31, 2006

Appl. No.:

11/395077

Inventors:

Jeremy de Souza - Redmond WA, US
Pravin K. Santiago - Issaquah WA, US
Stephen H. Wright - Bothell WA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06F 3/048

US Classification:

715781, 715788

Abstract:

Described is the selective exclusion of content returned in a requested screen capture operation, wherein exclusion may be determined by a window category and the requesting application program. For example, a magnification program will not received content captured from its own layered window or from any other layered magnification windows. A registration mechanism obtains and maintains a window handle for any window registered for exclusion. A screen capture mechanism uses the information to determine whether to exclude the content of windows when returning the captured screen content. Exclusion may be accomplished by enumerating areas that are not covered by any layered window and copying those areas to a screen representation buffer or the like, and separately enumerating areas that are covered by at least one layered window. A covered area is only copied to the screen representation when it does not correspond to an excluded window.

US Patent:

7978197, Jul 12, 2011

Filed:

Nov 12, 2004

Appl. No.:

10/987144

Inventors:

Charles N. Boyd - Woodinville WA, US
Michele B. Boland - Seattle WA, US
Michael A. Toelle - Bellevue WA, US
Anantha Rao Kancherla - Redmond WA, US
Amar Patel - Redmond WA, US
Iouri Tarassov - Bellevue WA, US
Stephen H. Wright - Bothell WA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06T 1/20
G06F 15/76

US Classification:

345522

Abstract:

Systems and methods for downloading algorithmic elements to a coprocessor and corresponding processing and communication techniques are provided. For an improved graphics pipeline, the invention provides a class of co-processing device, such as a graphics processor unit (GPU), providing improved capabilities for an abstract or virtual machine for performing graphics calculations and rendering. The invention allows for runtime-predicated flow control of programs downloaded to coprocessors, enables coprocessors to include indexable arrays of on-chip storage elements that are readable and writable during execution of programs, provides native support for textures and texture maps and corresponding operations in a vertex shader, provides frequency division of vertex streams input to a vertex shader with optional support for a stream modulo value, provides a register storage element on a pixel shader and associated interfaces for storage associated with representing the “face” of a pixel, provides vertex shaders and pixel shaders with more on-chip register storage and the ability to receive larger programs than any existing vertex or pixel shaders and provides 32 bit float number support in both vertex and pixel shaders.

US Patent:

7978205, Jul 12, 2011

Filed:

Sep 3, 2004

Appl. No.:

10/933850

Inventors:

Amar Patel - Redmond WA, US
Charles N. Boyd - Woodinville WA, US
David R. Blythe - Kirkland WA, US
Jeff M. J. Noyle - Kirkland WA, US
Michael A. Toelle - Bellevue WA, US
Stephen Harry Wright - Bothell WA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G09G 5/00

US Classification:

345619, 345620, 345621, 345622, 345623, 345419, 345420, 345581, 345582

Abstract:

An enhanced graphics pipeline is provided that enables common core hardware to perform as different components of the graphics pipeline, programmability of primitives including lines and triangles by a component in the pipeline, and a stream output before or simultaneously with the rendering a graphical display with the data in the pipeline. The programmer does not have to optimize the code, as the common core will balance the load of functions necessary and dynamically allocate those instructions on the common core hardware. The programmer may program primitives using algorithms to simplify all vertex calculations by substituting with topology made with lines and triangles. The programmer takes the calculated output data and can read it before or while it is being rendered. Thus, a programmer has greater flexibility in programming. By using the enhanced graphics pipeline, the programmer can optimize the usage of the hardware in the pipeline, program vertex, line or triangle topologies altogether rather than each vertex alone, and read any calculated data from memory where the pipeline can output the calculated information.

US Patent:

8001483, Aug 16, 2011

Filed:

Feb 13, 2007

Appl. No.:

11/706621

Inventors:

Jeremy de Souza - Redmond WA, US
Mohamed Sadek - Redmond WA, US
Pravin Kumar Santiago - Issaquah WA, US
Stephen H. Wright - Bothell WA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06F 3/048

US Classification:

715779, 715856, 715720

Abstract:

An application may be provided with an interface for hiding a cursor from or showing a cursor to a video driver and for causing cursor information to be saved in data storage and retrieved from data storage. The interface may include an application program interface (API), which may be callable from the application program. The interface may also include one or more bits included in a video driver, such that the modification of any of the one or more bits may change operation of the video driver. Modification of at least some of the bits may cause a cursor to be hidden from the video driver, may cause a previously hidden cursor to be shown to the video driver, may cause cursor information to be saved in a data storage, or may cause the cursor information to be retrieved from the data storage.