Steven A Cole

US Patent:

6335654, Jan 1, 2002

Filed:

Mar 17, 2000

Appl. No.:

09/528800

Inventors:

Steven W. Cole - Covina CA

Assignee:

The United States of America as represented by the Administrator of the National Aeronautics and Space Administration - Washington DC

International Classification:

G05F 302

US Classification:

327546, 327427, 323273, 323299

Abstract:

An inrush current control circuit having an input terminal connected to a DC power supply and an output terminal connected to a load capacitor limits the inrush current that charges up the load capacitor during power up of a system. When the DC power supply applies a DC voltage to the input terminal, the inrush current control circuit produces a voltage ramp at the load capacitor instead of an abrupt DC voltage. The voltage ramp results in a constant low level current to charge up the load capacitor, greatly reducing the current drain on the DC power supply.

US Patent:

45285039, Jul 9, 1985

Filed:

Mar 19, 1981

Appl. No.:

6/245583

Inventors:

Steven W. Cole - Covina CA

Assignee:

The United States of America as represented by the Department of Energy - Washington DC

International Classification:

G01R 3126

US Classification:

324158D

Abstract:

A method and apparatus for logging current-voltage (I-V) characteristic d of a solar cell module (10) in two modes using a portable instrument. One mode controls the load current through a circuit (36) in 256 equal intervals while voltage is measured from open circuit to at least halfway into the knee of the curve and the other mode controls the load voltage through a circuit (34) in 256 equal intervals from the lowest voltage measurement possible (short circuit) to at least halfway into the knee of the curve, under control of a microcomputer (12). All measurements are packed by discarding each measurement that is within 0. 5% of the value predicted from two previous measurements, except every ninth (9th) measurement which is retained. The remaining data is further packed into a memory block of a detachable storage medium (14) by recording the data points in sequence following a header containing data common to all points, with each point having the value of the controlled parameter recorded as the number of increments from the previous point recorded followed by the measured value. The detachable storage medium is preferably a solid state device for reliability, and is transferable to a playback terminal which unpacks the data for analysis and display.

US Patent:

43946135, Jul 19, 1983

Filed:

Jan 19, 1981

Appl. No.:

6/225961

Inventors:

Steven W. Cole - Covina CA

Assignee:

California Institute of Technology - Pasadena CA

International Classification:

H02J 710
G01R 19165

US Classification:

320 48

Abstract:

A full-charge indicator for battery chargers, includes a transistor which is in a conductive state as long as charging current to the battery is not less than a level which indicates that the battery did not reach full charge. When the battery reaches full charge, a voltage drop in a resistor in the charging current path is not sufficient to maintain the transistor in a conducting state, and therefore it is switched off. When this occurs an LED is turned on, to indicate a full charge state of the battery. A photocoupler together with a photocoupler transistor are included. When the transistor is off, the photocoupler activates the photocoupler transistor to shunt out a resistor, thereby reducing the charging current to the battery to a float charging current and prevent the battery from being overcharged and damaged.

US Patent:

51227312, Jun 16, 1992

Filed:

Feb 25, 1991

Appl. No.:

7/660371

Inventors:

Steven W. Cole - Covina CA

Assignee:

The United States of America as represented by the Administrator,
National Aeronautics and Space Adnministration - Washington DC

International Classification:

G01R 2316

US Classification:

324 77C

Abstract:

The invention relates to a method and apparatus for frequency spectrum analysis of an unknown signal in real time based upon integration of 1-bit samples of signal voltage amplitude corresponding to sine or cosine phases of a controlled center frequency clock used to time the samples taken, but preferably corresponding to both sine and cosine phases of the center frequency clock which is changed after each integration interval to sweep the frequency range of interest in steps. Integration of samples during each interval is carried out over a number of cycles of the center frequency clock spanning a number of cycles of an input signal to be analyzed. The invention may be used to detect the frequency of at least two signals simultaneously. By using a reference signal of known frequency and voltage amplitude (added to the two signals for parallel processing in the same way, but in a different channel with a sampling at the known frequency and phases of the reference signal), the absolute voltage amplitude of the other two signals may be determined by squaring the sine and cosine integrals of each channel and summing the squares to obtain relative power measurements in all three channels and, from the known voltage amplitude of the reference signal, obtaining an absolute voltage measurement for the other two signals by multiplying the known voltage of the reference signal with the ratio of the relative power of each of the other two signals to the relative power of the reference signal.

US Patent:

D3739350, Sep 24, 1996

Filed:

May 19, 1995

Appl. No.:

D/039027

Inventors:

Steven R. Cole - Dallas TX
Jacob C. Russler - Dallas TX

US Classification:

D 7621