Steven E Frank

US Patent:

46226311, Nov 11, 1986

Filed:

Dec 27, 1983

Appl. No.:

6/567233

Inventors:

Steven J. Frank - Mountain View CA
J. Scott Merritt - Newark CA

Assignee:

Plexus Computers, Inc. - San Jose CA

International Classification:

G06F 1516

US Classification:

364200

Abstract:

A tightly coupled computer system which provides for data coherency and includes an addressable main memory for storing blocks of data, a plurality of processors for accessing the blocks of data, each of the processors having an addressable cache memory for storing a number of blocks of data, a bus for intercoupling the plurality of processors with the addressable main memory and for intercoupling each of the plurality of processors with any other of the plurality of processors, and wherein only one of the plurality of processors and addressable main memory is a current owner of an address of a block of data, wherein the current owner has the correct data for the owned address, and wherein the ownership of an address is dynamically changeable among the addressable main memory and the plurality of processors.