Steven Weir

US Patent:

8273979, Sep 25, 2012

Filed:

May 1, 2009

Appl. No.:

12/434391

Inventors:

Steven P. Weir - Petaluma CA, US

Assignee:

Xandex, Inc. - Petaluma CA

International Classification:

H01L 31/042
H02J 1/12
G05F 1/00
H02J 1/00
G05F 3/16

US Classification:

136244, 323222, 323223, 323271, 323282, 323299, 323304, 307 45, 307 71, 307 80, 307 85

Abstract:

DC-DC converters are described that employ a time-averaged modulated bypass diode to facilitate the efficient harvest of power in photovoltaic systems.

US Patent:

8525503, Sep 3, 2013

Filed:

May 2, 2011

Appl. No.:

13/098703

Inventors:

Steven P. Weir - Petaluma CA, US

Assignee:

Xandex, Inc. - Petaluma CA

International Classification:

G05F 1/00

US Classification:

323283

Abstract:

A hybrid voltage rectifier enables a switch mode DC-DC power converter to safely power an external dynamic load by way of a substantially lossless conductive coupling between an output filter of the converter and the load. The rectifier is controlled so as to permit net average current through an inductor of the output filter to be approximately equal to, but not less than, zero by permitting very low loss conduction in the first quadrant and, selectively, cycle by cycle, in the third quadrant during load operation. The converter has a first switch, an output filter, a second switch, and a controller. The output filter is conductively coupled with the first switch, and has an inductor in series with the load. The controller sets state conditions of the second switch, such that the inductor operates in a continuous current mode.

US Patent:

20110273152, Nov 10, 2011

Filed:

May 5, 2011

Appl. No.:

13/101796

Inventors:

Steven P. Weir - Petaluma CA, US

Assignee:

XANDEX, INC. - Petaluma CA

International Classification:

G05F 1/10

US Classification:

323282

Abstract:

An output ripple voltage average amplitude of a switch mode DC-DC converter is dynamically maintained. The converter has a switch and an output filter. By varying a switching period (T) of the switch, Vis maintained at a substantially constant value over a first range of converter input voltages and a second range of switch duty cycles. Where the output filter includes an inductor having inductance (L) and a capacitor having capacitance (C) the average amplitude of Vis dynamically maintained by varying Twith respect to switch duty cycle (D) and input voltage (V) so as to approximately satisfy the following relationship: T=(V*8*L*C)/(V*(D−D)).

US Patent:

57486271, May 5, 1998

Filed:

Jun 10, 1994

Appl. No.:

8/257885

Inventors:

Steven P. Weir - Petaluma CA

Assignee:

Harris Corporation - Melbourne FL

International Classification:

H04J 100

US Classification:

370384

Abstract:

The present invention relates to an elastic linear buffer. The buffer is arranged in a closed loop, so that upon reaching the last address, the message is wrapped around and writing continues from the first address. Three markers are provided: a write pointer, which indicates the address of the data currently being stored; a head pointer, which indicates the last address of a previously recorded message; and a tail pointer, indicating the address of the data last read from the buffer. When the last bit of a presently received message is recorded, the head pointer is updated to indicate the address of that bit. Thereafter, a message is sent to the CPU which may commence reading of the message just received. Concurrently, a newly received message can be recorded at the addresses following the address of the head pointer up to the address of the tail pointer.

US Patent:

59404434, Aug 17, 1999

Filed:

Nov 4, 1994

Appl. No.:

8/334235

Inventors:

Steven P. Weir - Petaluma CA

Assignee:

Harris Corporation - Melbourne FL

International Classification:

H04B 300
H04L 2000

US Classification:

375257

Abstract:

A bus system providing increased connection flexibility and hot pluggable connections includes an open collector bus, a receiver connected to the open collector bus via a current sensor, a driver connected to the open collector bus, a peripheral card and a flexible cable operatively coupling the peripheral card, the receiver and the driver so as to provide point-to-point connection between the peripheral card and the open collector bus. The current sensor provides a control signal to the driver to increase the impedance of the driver in the event that a current is produced by the peripheral card.

US Patent:

58286640, Oct 27, 1998

Filed:

Feb 18, 1997

Appl. No.:

8/802436

Inventors:

Steven Weir - Petaluma CA

Assignee:

Harris Corporation - Melbourne FL

International Classification:

H04L 1256

US Classification:

370375

Abstract:

An integrated network switch operable in either full-frame or half-frame switching modes on a circuit-by-circuit basis. To effect selective operation in either full-frame or half-frame switching modes, an information memory buffer has the capacity of storing two samples per port. A connection memory contains the source addresses for the output ports. The most significant bit of an address designates the first or second sample of the two sample information memory buffer. For half-frame mode operation, the current value of the most significant bit of the write pointer (the address being written to) is used in the source address for reading when the source address is less than the write pointer. However, when the source address is greater than the write pointer, the most significant bit position is switched. For full-frame mode operation, the most significant bit of the source address will always take the inverse of the most significant bit for the write pointer.

US Patent:

56194960, Apr 8, 1997

Filed:

Aug 28, 1995

Appl. No.:

8/520004

Inventors:

Steven Weir - Petaluma CA

Assignee:

Harris Corporation - Melbourne FL

International Classification:

H04L 1256

US Classification:

370363

Abstract:

An integrated network switch operable in either full-frame or half-frame switching modes on a circuit-by-circuit basis. To effect selective operation in either full-frame or half-frame switching modes an information memory buffer has the capacity of storing two samples per port. A connection memory contains the source addresses for the output ports. The most significant bit of an address designates the first or second sample of the two sample information memory buffer. For half-frame mode operation, the current value of the most significant bit of the write pointer (the address being written to) is used in the source address for reading when the source address is less than the write pointer. However, when the source address is greater than the write pointer, the most significant bit position is switched. For full-frame mode operation, the most significant bit of the source address will always take the inverse of the most significant bit for the write pointer.

US Patent:

55598692, Sep 24, 1996

Filed:

Jan 29, 1996

Appl. No.:

8/590675

Inventors:

Steven P. Weir - Petaluma CA

Assignee:

Harris Corporation - Melbourne FL

International Classification:

H04M 176

US Classification:

379 99

Abstract:

A traditional modem includes a data access arrangement circuit located between the computer and the RJ11 connector. An alternate connection is made from this data access arrangement circuit to an input of a carbon microphone interface circuit. This carbon microphone interface circuit includes a galvanic isolation circuit and an impedance matching circuit. The input to the carbon microphone interface circuit is thus transformed to a format which is compatible with a traditional carbon microphone found in the handset of practically all telephones. Therefore, the output of the carbon microphone interface circuit can be directly connected to the handset of a telephone (or other carbon microphone audio terminal device), independent of the location or type of subscriber interface at the wall jack.