Steven M Weir

US Patent:

7111072, Sep 19, 2006

Filed:

Sep 13, 2000

Appl. No.:

09/661636

Inventors:

Abraham R. Matthews - San Jose CA, US
Steven Patrick Weir - Petaluma CA, US

Assignee:

Cosine Communications, Inc. - Redwood City CA

International Classification:

G06F 15/16

US Classification:

709238, 370412

Abstract:

A flexible, scalable hardware and software platform that allows a service provider to easily provide internet services, virtual private network services, firewall services, etc. , to a plurality of customers. One aspect provides a method and system for delivering security services. This includes connecting a plurality of processors in a ring configuration within a first processing system, establishing a secure connection between the processors in the ring configuration across an internet protocol (IP) connection to a second processing system to form a tunnel, and providing both router services and host services for a customer using the plurality of processors in the ring configuration and using the second processing system. a packet routing system and method is described that includes a processor identifier in each packet to route the packets to a physical processor, and a logical queue identifier to route the packets to the destination object within that processor.

US Patent:

8260918, Sep 4, 2012

Filed:

Sep 12, 2006

Appl. No.:

11/530901

Inventors:

Abraham Rabindranath Matthews - San Jose CA, US
Steven Patrick Weir - Petaluma CA, US

Assignee:

Fortinet, Inc. - Sunnyvale CA

International Classification:

G06F 15/173
H04L 12/28

US Classification:

709225, 370351

Abstract:

A flexible, scalable hardware and software platform that allows a service provider to easily provide internet services, virtual private network services, firewall services, etc. , to a plurality of customers. One aspect provides a method and system for delivering security services. This includes connecting a plurality of processors in a ring configuration within a first processing system, establishing a secure connection between the processors in the ring configuration across an internet protocol (IP) connection to a second processing system to form a tunnel, and providing both router services and host services for a customer using the plurality of processors in the ring configuration and using the second processing system, a packet routing system and method is described that includes a processor identifier in each packet to route the packets to a physical processor, and a logical queue identifier to route the packets to the destination object within that processor.

US Patent:

8273979, Sep 25, 2012

Filed:

May 1, 2009

Appl. No.:

12/434391

Inventors:

Steven P. Weir - Petaluma CA, US

Assignee:

Xandex, Inc. - Petaluma CA

International Classification:

H01L 31/042
H02J 1/12
G05F 1/00
H02J 1/00
G05F 3/16

US Classification:

136244, 323222, 323223, 323271, 323282, 323299, 323304, 307 45, 307 71, 307 80, 307 85

Abstract:

DC-DC converters are described that employ a time-averaged modulated bypass diode to facilitate the efficient harvest of power in photovoltaic systems.

US Patent:

8525503, Sep 3, 2013

Filed:

May 2, 2011

Appl. No.:

13/098703

Inventors:

Steven P. Weir - Petaluma CA, US

Assignee:

Xandex, Inc. - Petaluma CA

International Classification:

G05F 1/00

US Classification:

323283

Abstract:

A hybrid voltage rectifier enables a switch mode DC-DC power converter to safely power an external dynamic load by way of a substantially lossless conductive coupling between an output filter of the converter and the load. The rectifier is controlled so as to permit net average current through an inductor of the output filter to be approximately equal to, but not less than, zero by permitting very low loss conduction in the first quadrant and, selectively, cycle by cycle, in the third quadrant during load operation. The converter has a first switch, an output filter, a second switch, and a controller. The output filter is conductively coupled with the first switch, and has an inductor in series with the load. The controller sets state conditions of the second switch, such that the inductor operates in a continuous current mode.

US Patent:

8583800, Nov 12, 2013

Filed:

Aug 30, 2012

Appl. No.:

13/600179

Inventors:

Abraham R. Matthews - San Jose CA, US
Steven P. Weir - Petaluma CA, US

Assignee:

Fortinet, Inc. - Sunnyvale CA

International Classification:

G06F 15/173
G06F 9/46

US Classification:

709226, 718104

Abstract:

Methods and systems for offering network-based managed security services are provided. According to one embodiment, an IP service processing switch includes multiple service blades and one or more packet-passing data rings. The service blades each have multiple processors for providing customized security services to subscribers of a service provider. Upon receipt of a packet by a service blade from the one or more packet-passing data rings, a PEID value within the packet is inspected and when the PEID value corresponds to a PEID assigned to a processor associated with the service blade, the packet is steered to a software entity of a VR on the processor that corresponds to an LQID value within the packet. And, when the PEID value does not correspond to any PEIDs assigned to processors on the service blade, the packet is passed to a next service blade on the one or more packet-passing data rings.

US Patent:

20110273152, Nov 10, 2011

Filed:

May 5, 2011

Appl. No.:

13/101796

Inventors:

Steven P. Weir - Petaluma CA, US

Assignee:

XANDEX, INC. - Petaluma CA

International Classification:

G05F 1/10

US Classification:

323282

Abstract:

An output ripple voltage average amplitude of a switch mode DC-DC converter is dynamically maintained. The converter has a switch and an output filter. By varying a switching period (T) of the switch, Vis maintained at a substantially constant value over a first range of converter input voltages and a second range of switch duty cycles. Where the output filter includes an inductor having inductance (L) and a capacitor having capacitance (C) the average amplitude of Vis dynamically maintained by varying Twith respect to switch duty cycle (D) and input voltage (V) so as to approximately satisfy the following relationship: T=(V*8*L*C)/(V*(D−D)).

US Patent:

57486271, May 5, 1998

Filed:

Jun 10, 1994

Appl. No.:

8/257885

Inventors:

Steven P. Weir - Petaluma CA

Assignee:

Harris Corporation - Melbourne FL

International Classification:

H04J 100

US Classification:

370384

Abstract:

The present invention relates to an elastic linear buffer. The buffer is arranged in a closed loop, so that upon reaching the last address, the message is wrapped around and writing continues from the first address. Three markers are provided: a write pointer, which indicates the address of the data currently being stored; a head pointer, which indicates the last address of a previously recorded message; and a tail pointer, indicating the address of the data last read from the buffer. When the last bit of a presently received message is recorded, the head pointer is updated to indicate the address of that bit. Thereafter, a message is sent to the CPU which may commence reading of the message just received. Concurrently, a newly received message can be recorded at the addresses following the address of the head pointer up to the address of the tail pointer.

US Patent:

59404434, Aug 17, 1999

Filed:

Nov 4, 1994

Appl. No.:

8/334235

Inventors:

Steven P. Weir - Petaluma CA

Assignee:

Harris Corporation - Melbourne FL

International Classification:

H04B 300
H04L 2000

US Classification:

375257

Abstract:

A bus system providing increased connection flexibility and hot pluggable connections includes an open collector bus, a receiver connected to the open collector bus via a current sensor, a driver connected to the open collector bus, a peripheral card and a flexible cable operatively coupling the peripheral card, the receiver and the driver so as to provide point-to-point connection between the peripheral card and the open collector bus. The current sensor provides a control signal to the driver to increase the impedance of the driver in the event that a current is produced by the peripheral card.