Steven L Wright

US Patent:

6690383, Feb 10, 2004

Filed:

Jan 24, 2000

Appl. No.:

09/490545

Inventors:

Gordon Wesley Braudaway - Yorktown Heights NY
Albert Nessim Cazes - Mount Kisco NY
James Edward Christensen - Cortlandt Manor NY
Michael James Cordes - Newburgh NY
Donald Michael DeCain - New York NY
Shui-Chih Alan Lien - Briarcliff Manor NY
Frederick Cole Mintzer - Shrub Oak NY
Steven Lorenz Wright - Cortlandt Manor NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G09G 502

US Classification:

345600, 345603, 345604

Abstract:

The present invention provides methods and apparatus for the color calibration of displays. These methods are particularly useful for displays having properties different than those associated with cathode ray tubes (CRT). Some displays, for example liquid crystal displays (LCD), have a high luminance black, the chromas of their primaries are not independent of their luminance levels, the intensities of their primaries are not strictly monotonically increasing with respect to their RGB levels, the color additivity of their subpixels is affected by crosstalk or leakage and their color measurements are dependent on the view angle of the observer. Therefore, the usage of CRT methods is deficient for such displays. The methods and apparatus of the present invention overcome several deficiencies generally found in non-CRT display devices by employing techniques associated with the use of restricted ranges for the primaries, subtracting the color black from all color measurements, forming a modified display matrix and/or creating tables which correct errors due to the non-linearities or color leakages of these display devices. These enable images to be processed using algorithms of different complexity and precision.

US Patent:

6697037, Feb 24, 2004

Filed:

Apr 29, 1996

Appl. No.:

08/639583

Inventors:

Paul Matthew Alt - Yorktown Heights NY
Pedro A. Chalco - Yorktown Heights NY
Bruce Kenneth Furman - Beacon NY
Raymond Robert Horton - Dover Plains NY
Chandrasekhar Narayan - Hopewell Junction NY
Kevin Wilson Warren - Fishkill NY
Steven Lorenz Wright - Cortlandt Manor NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G09G 336

US Classification:

345 93, 345206, 345904

Abstract:

A matrix addressed display system designed so as to enable data line repair by electronic mechanisms which is efficient and low in cost and thus increases yield. Such active data line repair utilizes additional data driver outputs, a defect map memory in the TFT/LCD module and modification of the data stream to the data drivers by additional circuits between the display and the display adapter. A bus configuration on the display substrate is utilized which combines repair flexibility, low parasitic capacitance, and the ability to easily make the necessary interconnections. The number of interconnections is kept to a minimum, the connections are reliable, and the connections may be made with conventional wire bond or laser bond technology, or disk bond technology.

US Patent:

6801220, Oct 5, 2004

Filed:

Jan 26, 2001

Appl. No.:

09/771323

Inventors:

Paul F. Greier - Carmel NY
Kenneth C. Ho - Yonkers NY
Richard Ian Kaufman - Somers NY
Steven Edward Millman - Spring Valley NY
Gerhard R. Thompson - Wappingers Falls NY
Steven L. Wright - Cortlandt Manor NY
Chai Wah Wu - Poughquag NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G09G 502

US Classification:

345694, 345 55, 345690

Abstract:

Viewing angle characteristics of a liquid crystal display (LCD) are improved by reducing the number of subpixels in an image with mid-tone luminance values. In a preferred embodiment, a first table of entries associating subpixel intensity values and subpixel luminance values for a LCD in at least one viewing angle direction is provided. A target intensity value is determined from the first table, corresponding to the average subpixel luminance over a small number of adjacent subpixels. A second table of entries associates the target intensity values with intensity values above and below the target. The adjacent subpixel intensity values are modified according to the second table, thereby reducing the number of subpixels with mid-tone luminance values. The subpixel data is preferably processed within a portion of an application-specific integrated circuit (ASIC), contained within the display module.

US Patent:

6870643, Mar 22, 2005

Filed:

Jan 31, 2001

Appl. No.:

09/774067

Inventors:

Gerhard Robert Thompson - Wappingers Falls NY, US
Steven Lorenz Wright - Cortlandt Manor NY, US
Chai Wah Wu - Poughquag NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04N001/405
H04N001/52
G09G005/00

US Classification:

358 305, 358 306, 358534, 345596, 345597, 345616

Abstract:

A method (and system) for producing a halftoned image, includes calculating errors corresponding to a plurality of different viewing conditions of a halftone image, and minimizing a function of the errors, such that the halftoned image appears as a different image under different viewing conditions. Alternatively, in another embodiment, the halftoned image appears as the same image under different viewing conditions.

US Patent:

7282391, Oct 16, 2007

Filed:

Mar 21, 2006

Appl. No.:

11/385121

Inventors:

Paul Stephen Andry - Yorktown Heights NY, US
Leena Paivikki Buchwalter - Hopewell Junction NY, US
Raymond R. Horton - Dover Plains NY, US
John Ulrich Knickerbocker - Monroe NY, US
Cornelia K. Tsang - Mohegan Lake NY, US
Steven Lorenz Wright - Cortlandt Manor NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/00
H01L 23/48

US Classification:

438110, 257723

Abstract:

An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the placement guide; aligning the placement guide to an integrated circuit chip position on the module substrate; fixing the placement guide to the module substrate; placing an integrated circuit chip in the guide opening, sidewalls of the placement guide opening constraining electrically conductive bonding structures on bottom surface of the integrated circuit chip to self-align to an electrically conductive module substrate contact pad on the top surface of the module substrate in the integrated circuit chip position; and bonding the bonding structures to the module substrate contact pads, the bonding structures and the module substrate contact pads in direct physical and electrical contact after the bonding.

US Patent:

7474540, Jan 6, 2009

Filed:

Jan 10, 2008

Appl. No.:

11/972388

Inventors:

Bing Dang - Chappaqua NY, US
Steven L. Wright - Cortlandt Manor NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H05K 1/11

US Classification:

361803, 361748, 174250

Abstract:

A silicon carrier package includes a multi-layer member having at least a first layer and a second layer. A first electronic component includes a plurality of connector members that establish a first bond electrically interconnecting the first electronic component to the multi-layer member. A second electronic component includes a plurality of connector members that establish a second bond electrically interconnecting the second electronic component to the multi-layer member. At least one heating element is integrated into one of the first and second layers of the multi-layer member. The at least one heating element is selectively activated to loosen only one of the first and second bonds to facilitate removal of only one of the first and second electronic components from the multi-layer member. The other of the first and second bonds remains intact.

US Patent:

7501708, Mar 10, 2009

Filed:

Jul 31, 2006

Appl. No.:

11/461148

Inventors:

Paul Stephen Andry - Yorktown Heights NY, US
Steven Lorenz Wright - Cortlandt Manor NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 23/48
H01L 23/52
H01L 29/40

US Classification:

257778, 257E23021

Abstract:

The invention broadly and generally provides a connection structure for connecting a microelectronic device to a substrate, the aforesaid connection structure comprising: (a) a metal layer electrically connected to the aforesaid microelectronic device; (b) an interface element attached to an interface portion of the aforesaid metal layer; (c) a metallic solder element attached to the aforesaid interface element at an interface region of the aforesaid metallic solder element; and (d) a current dispersing structure operable to spatially disperse an electric current, the aforesaid current dispersing structure comprising an electrically insulating material and being disposed within at least one of the aforesaid interface portion, the aforesaid interface element, and the aforesaid interface region.

US Patent:

7615405, Nov 10, 2009

Filed:

Oct 15, 2007

Appl. No.:

11/872331

Inventors:

Paul Stephen Andry - Yorktown Heights NY, US
Leena Paivikki Buchwalter - Hopewell Junction NY, US
Raymond R. Horton - Dover Plains NY, US
John Ulrich Knickerbocker - Monroe NY, US
Cornelia K. Tsang - Mohegan Lake NY, US
Steven Lorenz Wright - Cortlandt Manor NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 21/50
H01L 21/48
H01L 21/44

US Classification:

438106, 138107, 138108, 138109, 138110, 138125, 257E21499, 257E215, 257E21505, 257E21506, 257E21508

Abstract:

An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the placement guide; aligning the placement guide to an integrated circuit chip position on the module substrate; fixing the placement guide to the module substrate; placing an integrated circuit chip in the guide opening, sidewalls of the placement guide opening constraining electrically conductive bonding structures on bottom surface of the integrated circuit chip to self-align to an electrically conductive module substrate contact pad on the top surface of the module substrate in the integrated circuit chip position; and bonding the bonding structures to the module substrate contact pads, the bonding structures and the module substrate contact pads in direct physical and electrical contact after the bonding.