Stuart Albert

US Patent:

7239268, Jul 3, 2007

Filed:

Sep 5, 2002

Appl. No.:

10/235215

Inventors:

Stuart D. Albert - Bricktown NJ, US
John F. Prorok - Neptune NJ, US
Joan Skudera, legal representative - Oceanport NJ, US

Assignee:

The United States of America as represented by the Secretary of the Army - Washington DC

International Classification:

G01S 7/28
G01S 13/00

US Classification:

342202, 342118, 342134, 342175, 342195, 398 79, 398 80, 398140, 398141, 398146, 398173, 398178, 398179

Abstract:

The number of power amplifiers required to amplify a plurality of transmission signals is reduced by using non-linear transmission lines (NTL) circuits. In general, a “combining” NTL circuit is used to combine the plurality of transmission signals to form a soliton pulse. The soliton pulse is then amplified such that each of its component transmission signals are amplified. A “dividing” NTL circuit is then used to divide the amplified soliton pulse into its component amplified transmission signals. The amplified transmission signals can therefore be transmitted over a communications channel without requiring a separate power amplifier for each.

US Patent:

49655817, Oct 23, 1990

Filed:

Jan 8, 1990

Appl. No.:

7/461943

Inventors:

William J. Skudera - Oceanport NJ
Stuart D. Albert - Bricktown NJ

Assignee:

The United States of America as represented by the Secretary of the Army - Washington DC

International Classification:

G01S 736
H04B 110

US Classification:

342 19

Abstract:

A real-time rejection circuit for passing low level desired signals in the resence of one or more strong, interfering signals. A chirp-Z transform system separates the various frequency components of a received signal into frequency segregated time domain signals. A power splitter separates the time domain signal into two paths. One path includes a modulator or switch that is normally biased "ON" for passing the time domain signal. The second path includes a diode detector that produces pulses of sufficient strength when a strong interfering component is present to override the bias and turn the modulator "OFF" for a sufficient period of time to attenuate the unwanted frequency components in the other path. The modulator output will primarily contain the low level desired frequency components that are passed through an inverse transform device for producing a frequency domain signal of the desired signal uncorrupted by unwanted signals.

US Patent:

54952530, Feb 27, 1996

Filed:

Nov 17, 1994

Appl. No.:

8/340926

Inventors:

Stuart D. Albert - Bricktown NJ
William J. Skudera - Oceanport NJ

Assignee:

The United States of America as represented by the Secretary of the Army - Washington DC

International Classification:

G01S 734

US Classification:

342159

Abstract:

A soliton rejection filter circuit is provided, for use in RF signal procing, for isolating a low level signal in the presence of stronger nearby interfering signals and detecting its modulation over a wide communication bandwidth centered at a relatively low RF frequency. The soliton filter circuit includes a nonlinear transmission line and a filter circuit.

US Patent:

54246741, Jun 13, 1995

Filed:

Nov 18, 1992

Appl. No.:

7/977942

Inventors:

William J. Skudera - Oceanport NJ
Elio A. Mariani - Hamilton Square NJ
Stuart D. Albert - Bricktown NJ

Assignee:

The United States of America as represented by the Secretary of the Army - Washington DC

International Classification:

H04B 110

US Classification:

327552

Abstract:

Two wide dynamic range detection circuits are disclosed, which are capable of detecting low-level desired signals in the presence of nearby strong interfering signals. Each circuit includes an attenuator scheme for attenuating the interfering signal while passing the desired signal. The first attenuator scheme uses a YIG filter in combination with an automatic gate arrangement. The second attenuator scheme uses a two-channel arrangement. The first channel uses a chirp-Z processor to derive a pulse-type transform signal in response to the strong interference signal. The second channel includes a YIG filter followed by a programmable notch filter which is controlled by the interference-signal pulse from the first channel. Following the programmable notch filter in the second channel is a chirp-Z processor followed by a gate arrangement wherein the gates are switched "OFF" under control of the interference-signal pulse from the first channel.

US Patent:

53550919, Oct 11, 1994

Filed:

May 21, 1992

Appl. No.:

7/886203

Inventors:

Stuart D. Albert - Bricktown NJ
William J. Skudera - Oceanport NJ

Assignee:

The United States of America as represented by the Secretary of the Army - Washington DC

International Classification:

H04B 110
G01S 736

US Classification:

328167

Abstract:

Disclosed is a real time interference signal rejection circuit which utils a conventional chirp-Z analyzer to generate a critical number and stop a counter circuit. The critical number is then read by a microprocessor which calculates new tap values from a set of predetermined tap values to reprogram a programmable filter.