Stuart L Taylor

US Patent:

8060846, Nov 15, 2011

Filed:

Apr 4, 2007

Appl. No.:

11/732950

Inventors:

Stuart A. Taylor - Sunnyvale CA, US
Edward M. Roseboom - Sunnyvale CA, US
Simon Burke - Sunnyvale CA, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 17/50

US Classification:

716106, 716107, 716108, 716110, 716111, 716115

Abstract:

Embodiments of a method for detecting potential areas of inductive coupling in a high density integrated circuit design are described. The inductance mitigation process first converts the inductive analysis into a density problem. The density of wires within a region that may switch within a portion of the system clock are compared to the density of wires will not switch within that same time. Regions of the chip that have a high ratio of density of switching wires versus non-switching wires are determined to have the potential of an inductive coupling problem. Additional grounded metal is added into the problematic regions of the chip to improve the switching versus non-switching wire density.

US Patent:

8149261, Apr 3, 2012

Filed:

Jan 10, 2007

Appl. No.:

11/652433

Inventors:

Shantanu Sarkar - San Jose CA, US
Randall B. Baird - Austin TX, US
Stuart Asbury Taylor - San Jose CA, US

Assignee:

Cisco Technology, Inc. - San Jose CA

International Classification:

H04N 7/14

US Classification:

348 1409

Abstract:

In one embodiment, a system includes a video multipoint control unit (MCU) and an audio conferencing bridge, the audio conferencing bridge being operable to receive audio streams from audio-only and video endpoints, and to negotiate video sessions between each of the video endpoints and the video MCU. In response to detecting when one of the video endpoints is an active speaker, the audio conferencing bridge transmitting a dummy audio stream over a dummy audio channel from the audio conferencing bridge to the video MCU. The dummy audio stream causes the video MCU to switch an image in a video output stream. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.

US Patent:

8607178, Dec 10, 2013

Filed:

Apr 30, 2012

Appl. No.:

13/460747

Inventors:

Stuart A. Taylor - San Jose CA, US
Victor Ma - Fremont CA, US
Bharat Patel - San Jose CA, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 17/50

US Classification:

716114, 716100, 716110, 716119, 716122, 716126

Abstract:

An integrated circuit (IC) chip having repeaters for propagating signals along relatively long wires that extend between and among lower-level physical blocks of the IC chip, wherein the repeaters are implemented as clocked flip-flops (or “repeater flops”). A method for automatically inserting and allocating such repeater flops during the logical and physical design of the IC chip is also provided.

US Patent:

20020038287, Mar 28, 2002

Filed:

Jun 15, 2001

Appl. No.:

09/882978

Inventors:

Jean-Marc Villaret - Paris, FR
Stuart Taylor - Cupertino CA, US
Kevin Ritschel - San Jose CA, US

International Classification:

G06F017/60

US Classification:

705/041000

Abstract:

The present invention is directed to a system and method which provide authentication for electronic transactions. The present invention involves inputting smart card information from a smart card into a payment enabled device and inputting an identification number into the payment enabled device. The smart card information and the identification number are then authenticated. Payment information is then sent from a server to a desired location after authenticating the smart card information and identification number.

US Patent:

20020194078, Dec 19, 2002

Filed:

Jun 15, 2001

Appl. No.:

09/882955

Inventors:

Jean-Marc Villaret - Paris, FR
Stuart Taylor - Cupertino CA, US
Kevin Ritschel - San Jose CA, US

International Classification:

G06F017/60

US Classification:

705/026000

Abstract:

A system and method for enabling a merchant to connect electronically to the customer, specifically the customer's portable digital appliance, from the merchant's point of sale (POS) terminal, thereby providing “last meter connectivity”. That is, the consumer can synchronize or download data onto (or off of) his/her portable appliance from (to) any public device, such as the POS terminal.

US Patent:

20020194135, Dec 19, 2002

Filed:

Jun 15, 2001

Appl. No.:

09/882625

Inventors:

Stuart Taylor - Cupertino CA, US
Jean-Marc Villaret - Paris, FR
Kevin Ritschel - San Jose CA, US

International Classification:

G06F017/60

US Classification:

705/064000

Abstract:

The present system and method involves a multi-application terminal that comprises a memory for storing a plurality of payment and non-payment applications, a memory management unit for separating said applications in said memory. This permits said non-payment applications to exist side-by-side with said payment application without requiring additional certification. The multi-application terminal also comprises a processor for executing one or more applications, said memory management unit operable to assign a protected region within said memory to each application being executed by said processor. Said payment applications are operable to provide payment related services over a secured financial network and said non-payment applications operable are to provide non-payment related services over an open network.

US Patent:

20080066040, Mar 13, 2008

Filed:

Aug 17, 2007

Appl. No.:

11/840660

Inventors:

Stuart Taylor - San Jose CA, US
Victor Ma - Fremont CA, US
Bharat Patel - San Jose CA, US

International Classification:

G06F 17/50
H03K 19/0175

US Classification:

716010000, 326062000

Abstract:

An integrated circuit (IC) chip having repeaters for propagating signals along relatively long wires that extend between and among lower-level physical blocks of the IC chip, wherein the repeaters are implemented as clocked flip-flops (or “repeater flops”). A method for automatically inserting and allocating such repeater flops during the logical and physical design of the IC chip is also provided.

US Patent:

53135903, May 17, 1994

Filed:

Jan 5, 1990

Appl. No.:

7/461572

Inventors:

Stuart A. Taylor - Sunnyvale CA

Assignee:

MasPar Computer Corporation - Sunnyvale CA

International Classification:

G06F 1300
H04Q 1104

US Classification:

395325

Abstract:

A network and method for interconnecting a plurality of router elements in a parallel computer. The network forms a routing system for routing data from source processing elements to destination processing elements. The input lines and output lines of each router chip are prioritized. Higher priority output lines from a given output group of a first routing element are connected to low priority input lines of a second routing element and lower priority output lines from the output group of the first rotating element are connected to higher priority input lines of the second routing element.