Susanne A Paul

US Patent:

6362606, Mar 26, 2002

Filed:

Sep 12, 2000

Appl. No.:

09/659876

Inventors:

Timothy J. Dupuis - Austin TX
Susanne A. Paul - Austin TX

Assignee:

Silicon Laboratories, INC - Austin TX

International Classification:

G05F 140

US Classification:

323272, 323369

Abstract:

An RF power amplifier is provided for use with wireless transmission systems such as cellular phones. An RF power amplifier includes direct drive amplifier circuitry operating in a push-pull scheme. The RF power amplifier includes a pair of switching devices driven by a pair of mutually coupled inductive devices. The inductive devices may be magnetically or capacitively coupled together. The RF power amplifier may be formed on a single integrated circuit and include an on-chip bypass capacitor. The RF power amplifier may utilize a voltage regulator for providing a regulated voltage source. The RF power amplifier may be provided using a dual oxide gate device resulting in an improved amplifier. The RF power amplifier may be packaged using flip chip technology and multi-layer ceramic chip carrier technology.

US Patent:

6392488, May 21, 2002

Filed:

Sep 12, 2000

Appl. No.:

09/659636

Inventors:

Timothy J. Dupuis - Austin TX
Susanne A. Paul - Austin TX

Assignee:

Silicon Laboratories, Inc. - Austin TX

International Classification:

H03F 316

US Classification:

330277, 330305, 330307, 330311, 257315, 365187

Abstract:

An RF power amplifier is provided for use with wireless transmission systems such as cellular phones. An RF power amplifier includes direct drive amplifier circuitry operating in a push-pull scheme. The RF power amplifier includes a pair of switching devices driven by a pair of mutually coupled inductive devices. The inductive devices may be magnetically or capacitively coupled together. The RF power amplifier may be formed on a single integrated circuit and include an on-chip bypass capacitor. The RF power amplifier may utilize a voltage regulator for providing a regulated voltage source. The RF power amplifier may be provided using a dual oxide gate device resulting in an improved amplifier. The RF power amplifier may be packaged using flip chip technology and multi-layer ceramic chip carrier technology.

US Patent:

6448847, Sep 10, 2002

Filed:

Sep 12, 2000

Appl. No.:

09/659873

Inventors:

Susanne A. Paul - Austin TX
Timothy J. Dupuis - Austin TX

Assignee:

Silicon Laboratories, Inc. - Austin TX

International Classification:

G06G 712

US Classification:

327563, 330252

Abstract:

A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.

US Patent:

6462620, Oct 8, 2002

Filed:

Sep 12, 2000

Appl. No.:

09/660009

Inventors:

Timothy J. Dupuis - Austin TX
Susanne A. Paul - Austin TX

Assignee:

Silicon Laboratories, Inc. - Austin TX

International Classification:

H03F 318

US Classification:

330264, 330269, 330302

Abstract:

An RF power amplifier is provided for use with wireless transmission systems such as cellular phones. An RF power amplifier includes direct drive amplifier circuitry operating in a push-pull scheme. The RF power amplifier includes a pair of switching devices driven by a pair of mutually coupled inductive devices. The inductive devices may be magnetically or capacitively coupled together. The RF power amplifier may be formed on a single integrated circuit and include an on-chip bypass capacitor. The RF power amplifier may utilize a voltage regulator for providing a regulated voltage source. The RF power amplifier may be provided using a dual oxide gate device resulting in an improved amplifier. The RF power amplifier may be packaged using flip chip technology and multi-layer ceramic chip carrier technology.

US Patent:

6463566, Oct 8, 2002

Filed:

Feb 4, 2000

Appl. No.:

09/497985

Inventors:

Susanne A. Paul - Austin TX

Assignee:

Massachusetts Institute of Technology - Cambridge MA

International Classification:

G06F 1750

US Classification:

716 1, 716 2

Abstract:

A charge processing circuit which integrates charge at an output node that is representative of an input charge provided at an input node. The circuit includes a precharge path coupled to the input node, the precharge path operable for setting the potential of the input node to a fixed precharge potential prior to introduction of input charge to the input node. A sensing path is coupled to the input and output nodes which is operable for returning the potential of the input node to the fixed precharge potential subsequent to introduction of input charge to the input node. A feedback element has an input coupled to the sensing path and the precharge path, the feedback element operable for setting said fixed precharge potential. In another embodiment there is provided a method of integrating charge at an output node of a charge processing circuit that is representative of input charge provided at an input node. The method includes replenishing charge at the input node; draining charge from the input node; stopping the draining of charge from the input node in response to a feedback element detecting when the input node reaches a fixed precharge potential; introducing an input charge on the input node from a source; draining charge from the input node onto the output node; and stopping the draining of charge from the input node in response to a feedback element detecting when the input node reaches the fixed precharge potential.

US Patent:

6549071, Apr 15, 2003

Filed:

Sep 12, 2000

Appl. No.:

09/660123

Inventors:

Susanne A. Paul - Austin TX
Timothy J. Dupuis - Austin TX

Assignee:

Silicon Laboratories, Inc. - Austin TX

International Classification:

H03F 345

US Classification:

330252, 330253, 330277

Abstract:

A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.

US Patent:

6727754, Apr 27, 2004

Filed:

Apr 26, 2001

Appl. No.:

09/842456

Inventors:

Timothy J. Dupuis - Austin TX
David R. Welland - Austin TX
Ali M. Niknejad - Austin TX
Susanne A. Paul - Austin TX

Assignee:

Silicon Laboratories, Inc. - Austin TX

International Classification:

H03F 345

US Classification:

330254, 330133, 330134, 330285

Abstract:

A method and apparatus is provided for detecting the output power of an RF power amplifier for purposes of controlling the output power. A circuit for generating an output power control signal includes a power detector to detect the output power of an RF power amplifier. A variable gain amplifier is coupled to the power detector for amplifying the output of the power detector. The value of the generated control signal is a function of the gain of the variable gain amplifier.

US Patent:

6737698, May 18, 2004

Filed:

Mar 11, 2002

Appl. No.:

10/094859

Inventors:

Susanne A. Paul - Austin TX
Timothy J. Dupuis - Austin TX
Ali M. Niknejad - Berkeley CA

Assignee:

Silicon Laboratories, Inc. - Austin TX

International Classification:

H01L 27108

US Classification:

257306, 257307

Abstract:

A method and apparatus if provided for shielding a capacitor structure formed in a semiconductor device. In a capacitor formed in an integrated circuit, one or more shields are disposed around layers of conductive strips to shield the capacitor. The shields confine the electric fields between the limits of the shields.