Thao T Pham

US Patent:

6664026, Dec 16, 2003

Filed:

Mar 22, 2001

Appl. No.:

09/815540

Inventors:

Son Van Nguyen - San Jose CA
Neil Leslie Robertson - Palo Alto CA
Thomas Edward Dinan - San Jose CA
Thao Duc Pham - San Jose CA

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G03F 700

US Classification:

430311, 430313, 430316, 430317, 430318, 438702, 216 72, 4272497

Abstract:

An etch barrier to be used in a photolithograph process is disclosed. A silicon rich etch barrier is deposited on a substrate using a low energy deposition technique. A diamond like carbon layer is deposited on the silicon rich etch barrier. Photoresist is then placed on this etch barrier DLC combination. To form photolithographic features, successive steps of oxygen and flourine reactive ion etching is used.

US Patent:

6776917, Aug 17, 2004

Filed:

Jan 3, 2001

Appl. No.:

09/754235

Inventors:

Richard Hsiao - San Jose CA
Son Van Nguyen - Los Gatos CA
Thao Pham - San Jose CA
Eugene Zhao - San Jose CA

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

B44C 122

US Classification:

216 88, 216 89, 216 94, 451 29, 438691, 438692

Abstract:

The method for controlling the depth of polishing during a CMP process involves the deposition of a polishing stop layer at an appropriate point in the device fabrication process. The stop layer is comprised of a substance that is substantially more resistant to polishing with a particular polishing slurry that is utilized in the CMP process than a polishable material layer. Preferred stop layer materials of the present invention are tantalum and diamond-like carbon (DLC), and the polishable layer may consist of alumina. In one embodiment of the present invention the stop layer is deposited directly onto the top surface of components to be protected during the CMP process. A polishable layer is thereafter deposited upon the stop layer, and the CMP polishing step removes the polishable material layer down to the portions of the stop layer that are deposited upon the top surfaces of the components. The stop layer is thereafter removed from the top surface of the components. In this embodiment, the fabricated height of the components is preserved.

US Patent:

6804878, Oct 19, 2004

Filed:

Dec 21, 1999

Appl. No.:

09/468603

Inventors:

Richard Thomas Campbell - Campbell CA
Richard Hsiao - San Jose CA
Yiping Hsiao - San Jose CA
Son Van Nguyen - Los Gatos CA
Thao John Pham - San Jose CA

Assignee:

Hitachi Global Storage Technologies Netherlands B.V.

International Classification:

G11B 5112

US Classification:

2960312, 2960315, 2960316, 2960318, 216 22, 216 52, 216 66, 451 41, 20419234

Abstract:

A method is provided of smoothing the perturbations on a surface, in particular the surface of a magnetic head slider, the method comprising several steps. At least one air-bearing surface to be smoothed is exposed to an ion species generated from a defined source to form a beam of incident radiation. The beam has a linear axis emanating from the source and thus forms an angle of incident radiation with respect to the surface to be smoothed. The at least one surface is smoothed by exposing the surface(s) to be smoothed to the beam of incident radiation, where the angle of incident radiation is less than 90Â relative to a vertical axis drawn perpendicular to the surface to be smoothed. To make a corrosion resistant magnetic head slider, the method further comprises coating the smoothed surface with a layer of amorphous carbon.

US Patent:

7323350, Jan 29, 2008

Filed:

Sep 30, 2004

Appl. No.:

10/957097

Inventors:

Sukhbir Singh Dulay - San Jose CA, US
Justin Jia-Jen Hwu - San Jose CA, US
Thao John Pham - San Jose CA, US

Assignee:

Hitachi Global Storage Technologies Netherlands B.V. - Amsterdam

International Classification:

H01L 21/00
H01L 23/58

US Classification:

438 10, 438 17, 257 48

Abstract:

A method of making and using thin film calibration features is described. To fabricate a calibration standard according to the invention raised features are first formed from an electrically conductive material with a selected atomic number. A conformal thin film layer is deposited over the exposed sidewalls of the raised features. The sidewall material is selected to have a different atomic number and is preferably an nonconductive such as silicon dioxide or alumina. After the nonconductive material deposition, a controlled directional RIE process is used to remove the insulator layer deposited on the top and bottom surface of the lines and trenches. The remaining voids between the sidewalls of the raised features are filled with a conductive material. The wafer is then planarized with chemical mechanical planarization (CMP) to expose the nonconductive sidewall material on the surface. The nonconductive sidewall material will be fine lines embedded in conductive material.

US Patent:

7454828, Nov 25, 2008

Filed:

Nov 23, 2005

Appl. No.:

11/286076

Inventors:

Sukhbir Singh Dulay - San Jose CA, US
Justin Jia-Jen Hwu - San Jose CA, US
Thao John Pham - San Jose CA, US

Assignee:

Hitachi Global Storage Technologies Netherlands B.V. - Amsterdam

International Classification:

G11B 5/127
H04R 31/00

US Classification:

2960316, 2960313, 2960315, 2960318, 216 62, 216 65, 216 66, 20419234, 360122, 360317, 451 5, 451 41

Abstract:

A method for measuring recession in a wafer undergoing an asymmetrical ion mill process. The method includes the formation of first and second reference features and possibly a dummy feature. The reference features are constructed such that the location of the midpoint between them is unaffected by the asymmetrical ion mill. By measuring the distance between a portion of the dummy feature and the midpoint between the reference features, the amount of recession of the dummy feature can be measured. The measurement can be used to calculate the relative location of the flare to the read sensor rear edge through overlay information. By keeping the angles of the sides of the features steep (ie. nearly parallel with the direction in which the ion mill is asymmetrical) the amount of material consumed on each of the reference features is substantially equal and the midpoint between the reference features is substantially stationary.

US Patent:

20150154990, Jun 4, 2015

Filed:

Dec 2, 2013

Appl. No.:

14/094690

Inventors:

- Amsterdam, NL
Quang Le - San Jose CA, US
Thao Pham - San Jose CA, US
David J. Seagle - Morgan Hill CA, US
Hicham M. Sougrati - Elk Grove CA, US
Petrus A. Van Der Heijden - Cupertino CA, US

Assignee:

HGST Netherlands B.V. - Amsterdam

International Classification:

G11B 5/39

Abstract:

A scissor type magnetic sensor having an improved back edge bias structure. The back edge bias structure extends beyond the sides of the sensor stack for improved bias moment and is formed on a flat topography that provide for improved magnetic biasing. The sensor is formed by a method that includes first defining a sensor width and then depositing a multi-layer insulation layer that includes a dielectric layer that is resistant to ion milling and the depositing a fill layer over the dielectric layer that is removable by ion milling. After the multi-layer insulation layer has been deposited the back edge (i.e. stripe height) of the sensor is formed by masking and ion milling. This ion milling removes portions of the non-magnetic, electrically insulating fill layer that extend beyond the stripe height and beyond the sides of the sensor, leaving the dielectric layer there-beneath.

US Patent:

20140170774, Jun 19, 2014

Filed:

Dec 13, 2012

Appl. No.:

13/714148

Inventors:

- Amsterdam, NL
Aron Pentek - San Jose CA, US
Thao Pham - San Jose CA, US
Yi Zheng - San Ramon CA, US

Assignee:

HGST NETHERLANDS B.V. - Amsterdam

International Classification:

H01L 29/66

US Classification:

438 3

Abstract:

A method for manufacturing a magnetic sensor that allows the sensor to be constructed with a very narrow track width and with smooth, well defined side walls. A tri-layer mask structure is deposited over a series of sensor layers. The tri-layer mask structure includes an under-layer, a Si containing hard mask deposited over the under-layer and a photoresist layer deposited over the Si containing hard mask. The photoresist layer is photolithographically patterned to define a photoresist mask. A first reactive ion etching is performed to transfer the image of the photoresist mask onto the Si containing hard mask. The first reactive ion etching is performed in a chemistry that includes CF, CHF, O, and He. A second reactive ion etching is then performed in an oxygen chemistry to transfer the image of the Si containing hard mask onto the under-layer, and an ion milling is performed to define the sensor.