Theodore Myles Burk

Address:

901 Hunters Crk Dr, Cedar Park, TX 78613

VIN:

2HKYF18757H540840

Make:

HONDA

Model:

PILOT

Year:

2007

US Patent:

7856283, Dec 21, 2010

Filed:

Jan 31, 2006

Appl. No.:

11/344274

Inventors:

Theodore Burk - Austin TX, US
Daniel T. Bogard - Austin TX, US

Assignee:

Sigmatel, Inc. - Austin TX

International Classification:

G06F 17/00
H04R 3/00
H04R 1/40
H04J 3/00

US Classification:

700 94, 381111, 381 97, 370498

Abstract:

A digital microphone interface includes a phase generator for generating a phase signal. A clock generator produces a digital microphone clock at a selected frequency based on the frequency select signal, and supplying the digital microphone clock to a digital microphone. A first data latch, operably coupled to the phase generator, produces a stream of first data from a first channel of the digital microphone, based on a phase select signal and the phase signal.

US Patent:

20070132624, Jun 14, 2007

Filed:

Jan 31, 2006

Appl. No.:

11/344275

Inventors:

Theodore Burk - Austin TX, US
Daniel Bogard - Austin TX, US

International Classification:

H03M 1/12

US Classification:

341155000

Abstract:

A audio codec includes a first analog to digital converter for producing a first one-bit data stream, a second one-bit data stream is received from a digital microphone. A selection module produces a one-bit output signal that is the first one-bit data stream when a selection signal is in a first state, and produces a the one-bit output signal that is the second one-bit data stream when the selection signal is in a second state. A decimation and filter module produces a down sampled signal based on the one-bit output signal.

US Patent:

20220231603, Jul 21, 2022

Filed:

Sep 17, 2021

Appl. No.:

17/478433

Inventors:

- Edinburgh, GB
Graeme G. MACKAY - Austin TX, US
Lingli ZHANG - Austin TX, US
Ruoxin JIANG - Austin TX, US
Theodore M. BURK - Cedar Park TX, US

Assignee:

Cirrus Logic International Semiconductor Ltd. - Edinburgh

International Classification:

H02M 3/158
H02M 1/00
H02M 1/32
H02M 1/08

Abstract:

A method for determining if an inductor coupled to a switching network has been electrically shorted may include applying a voltage across the inductor for a predetermined period of time, controlling an impedance in an electrical path of a voltage source generating the voltage and the inductor, sensing an inductor current through the inductor, comparing the inductor current with a predetermined current threshold, and determining whether the inductor has been electrically shorted based on the inductor current, the predetermined current threshold, and the predetermined period of time.

US Patent:

20210367510, Nov 25, 2021

Filed:

Dec 11, 2020

Appl. No.:

17/119517

Inventors:

- Edinburgh, GB
Eric J. KING - Austin TX, US
Graeme G. MACKAY - Austin TX, US
Theodore M. BURK - Cedar Park TX, US

Assignee:

Cirrus Logic International Semiconductor Ltd. - Edinburgh

International Classification:

H02M 3/04
H02M 1/00

Abstract:

A system for controlling a current in a power converter may include an outer control loop configured to use an outer set of output voltage thresholds for an output voltage generated by the power converter in order to provide hysteretic control of the current, an inner control loop configured to use an inner set of output voltage thresholds for the output voltage in order to provide continuous control of the current, the inner control loop further configured to measure a time duration required for the output voltage to cross a single pair of two output voltage thresholds of the inner set of output voltage thresholds in order to determine an input-referred estimate of a current load of the power converter and set a peak current threshold and a valley current threshold for the current based on the input-referred estimate of the current load.

US Patent:

20180337597, Nov 22, 2018

Filed:

May 21, 2018

Appl. No.:

15/984965

Inventors:

- Edinburgh, GB
Sarang VADNERKAR - Austin TX, US
Theodore M. BURK - Cedar Park TX, US
Jeffrey MAY - Dripping Springs TX, US

Assignee:

Cirrus Logic International Semiconductor Ltd. - Edinburgh

International Classification:

H02M 3/156
H02M 1/08

Abstract:

A DC-DC converter and corresponding method for transitioning between a discontinuous conduction mode, DCM, and a continuous conduction mode, CCM, wherein the DC-DC converter is configured to power a signal processing system within an integrated circuit, is provided. The method comprises receiving input data, wherein the input data is for inputting into the signal processing system; determining an amplitude of the input data; and transitioning between DCM and CCM based on the amplitude of the input data. A DC-DC converter and respective method for transitioning from CCM to DCM comprising determining an estimated current representative of an inductor current through an inductor of the DC-DC converter; and transitioning from CCM to DCM based on the estimated current, is provided. A DC-DC converter and respective method for transitioning from DCM to CCM comprising determining either an output voltage of the DC-DC converter or a duty cycle of the DC-DC converter; and transitioning from DCM to CCM based on the determined output voltage or duty cycle of the DC-DC converter, is provided.

US Patent:

20180337601, Nov 22, 2018

Filed:

May 22, 2018

Appl. No.:

15/986200

Inventors:

- Edinburgh, GB
Ullas PAZHAYAVEETIL - Cedar Park TX, US
Theodore M. BURK - Cedar Park TX, US
Jeffrey MAY - Dripping Springs TX, US

Assignee:

Cirrus Logic International Semiconductor Ltd. - Edinburgh

International Classification:

H02M 3/158
H02M 3/157

Abstract:

A DC-DC converter and a corresponding method for maintaining an output voltage of the DC-DC converter, wherein the DC-DC converter is configured to operate in a discontinuous conduction mode, within a predetermined voltage range. The method comprises adjusting a duty cycle of the DC-DC converter based on the output voltage to maintain the output voltage within a predetermined voltage range; wherein the duty cycle of the DC-DC converter is adjusted by switching between a first switching frequency to a second switching frequency, and the first switching frequency and the second switching frequency are selected such that the first switching frequency and the second switching frequency fall outside of at least one predefined disallowed frequency band.