Thi Ngoc Tran

US Patent:

7958402, Jun 7, 2011

Filed:

Sep 22, 2008

Appl. No.:

12/235031

Inventors:

Van H. Lee - Cedar Park TX, US
David D. Sanner - Rochester MN, US
Thi N. Tran - Round Rock TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 11/00

US Classification:

714 38

Abstract:

Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time.

US Patent:

8055719, Nov 8, 2011

Filed:

Jul 16, 2008

Appl. No.:

12/173846

Inventors:

Christopher Tung Phan - Rochester MN, US
Thi Ngoc Tran - Round Rock TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 15/16

US Classification:

709206

Abstract:

According to one embodiment of the present invention, multiple data scan operations are compacted into a single network message. A plurality of requests to perform a data scan operation on a remote node controller is received, forming a set of received data scan operation requests. A set of data scan operations are generated based on the set of received data scan operation requests, forming a set of generated data scan operations. A network message comprising the set of generated data scan operations is generated, forming a first compacted data scan operation network message. The first compacted data scan operation network message is sent to the remote node controller. A second compacted data scan operation network message is received from the remote node controller, wherein the second compacted data scan operation network message comprises a set of completed data scan operations. The set of completed data scan operations are separated into individual completed data scan operations. Each individual completed data scan operation is sent to the user that issued the request.

US Patent:

8176355, May 8, 2012

Filed:

Jun 7, 2007

Appl. No.:

11/759331

Inventors:

Daniel M. Crowell - Rochester MN, US
Alongkorn Kitamorn - Austin TX, US
Kevin F. Reick - Round Rock TX, US
Thi N. Tran - Round Rock TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 11/00

US Classification:

714 2, 714758

Abstract:

A mechanism is provided for recovering from a data scan error. A service processor determines the nature of the data scan error and, depending on the nature of the error, performs one of a plurality of data scan error recovery procedures.

US Patent:

8495430, Jul 23, 2013

Filed:

Mar 10, 2011

Appl. No.:

13/044640

Inventors:

Van H. Lee - Cedar Park TX, US
David D. Sanner - Rochester MN, US
Thi N. Tran - Round Rock TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 11/00

US Classification:

714 381

Abstract:

Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time.

US Patent:

8578219, Nov 5, 2013

Filed:

Mar 14, 2011

Appl. No.:

13/046865

Inventors:

Daniel M. Crowell - Rochester MN, US
David D. Sanner - Rochester MN, US
Thi N. Tran - Round Rock TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 11/00

US Classification:

714 55, 713500

Abstract:

A mechanism is provided for monitoring and verifying a clock state of a chip that does not write out clock state information. Responsive to identifying an access to the chip, the access is scanned to identify a chip register and a clock domain that will be accessed. A determination is made as to whether a bit of a clock trust unit associated with the chip register and the clock domain indicates whether to trust a clock state associated with the bit in a logical clock state unit. Responsive to the bit of the clock trust unit indicating that the clock state associated with the bit in the logical clock state unit is trusted, the clock state from the logical clock state unit is identified. Responsive to the clock state matching the clock state required by the access, the access is forwarded to the chip for execution.

US Patent:

20040210793, Oct 21, 2004

Filed:

Apr 21, 2003

Appl. No.:

10/422681

Inventors:

Shaival Chokshi - Austin TX, US
Ashwini Kulkarni - Austin TX, US
Van Lee - Cedar Park TX, US
David Randall - Leander TX, US
Thi Tran - Round Rock TX, US
David Willoughby - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L001/22

US Classification:

714/005000

Abstract:

A method, apparatus, and computer instructions for recovering terminated partitions in a logical partitioned data processing system. A termination of a partition in a set of partitions associated with a host bridge in the logical partitioned data processing system is detected. The state of other partitions within the set of partitions is checked in response to detecting the termination. A recovery process is initiated if all partitions in the set of partitions have terminated. Input/output slots associated with the host bridge are reset to a normal state if the recovery process is successful. The set of partitions is rebooted after resetting the input/output slots associated with the host bridge without rebooting the logical partitioned data processing system.

US Patent:

20140173250, Jun 19, 2014

Filed:

Dec 19, 2012

Appl. No.:

13/719774

Inventors:

- Armonk NY, US
David D. Sanner - Rochester MN, US
Thi N. Tran - Round Rock TX, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

G06F 15/76

US Classification:

712 30

Abstract:

Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors.

US Patent:

20140173251, Jun 19, 2014

Filed:

Jan 9, 2014

Appl. No.:

14/151119

Inventors:

- Armonk NY, US
David D. Sanner - Rochester MN, US
Thi N. Tran - Round Rock TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 15/76

US Classification:

712 30

Abstract:

Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors.