Thomas Craig Duffy

US Patent:

6563294, May 13, 2003

Filed:

Apr 1, 2002

Appl. No.:

10/112738

Inventors:

Thomas P. Duffy - Chandler AZ
Ryan Goodfellow - Mesa AZ
David Susak - Phoenix AZ

Assignee:

Primarion, Inc. - Tempe AZ

International Classification:

G05F 140

US Classification:

323283

Abstract:

A highly phased power regulation (converter) system having an improved control feature is provided. A controller, such as a digital signal processor or microprocessor, receives digital information from a plurality of power conversion blocks and transmits control commands in response to the information. The controller is able to change the mode of operation of the system and/or re-phase the power blocks to accommodate a dynamic load requirement, occasions of high transient response or detection of a fault. In one embodiment, a microprocessor receives digital information and converted power from one or more power blocks. In this manner, the microprocessor is able to receive feedback on its own operation. The controller is also able to anticipate and predict conditions by analyzing precursor data. In this manner, the controller is able to modify the system as needed in anticipation of the forthcoming event.

US Patent:

6674320, Jan 6, 2004

Filed:

Oct 16, 2001

Appl. No.:

09/978613

Inventors:

Thomas P. Duffy - Chandler AZ
Yi Zhang - El Segundo CA
Malay Trivedi - Phoenix AZ

Assignee:

Primarion, Inc. - Tempe AZ

International Classification:

H03B 100

US Classification:

327555, 336155

Abstract:

A control system, method and apparatus is provided for an orthogonally variable inductor. A method and apparatus is also provided for voltage regulation. Regulation is provided without the use of Silicon devices, such as FETs, in the output current path. Efficient voltage regulation is provided via varying the inductance of a device in the output current path, and alternatively via varying the inductance and duty cycle. An orthogonal inductive device is provided to vary the inductance in the output current path. The orthogonal inductive device is an external H field device, a series method orthogonal flux device, or a combined core device. Furthermore, a variable inductor is also provided in filters, amplifiers, and oscillators.

US Patent:

6795009, Sep 21, 2004

Filed:

Sep 9, 2002

Appl. No.:

10/237903

Inventors:

Thomas P. Duffy - Chandler AZ
Malay Trivedi - Phoenix AZ
Kevin Mori - Chandler AZ

Assignee:

Primarion, Inc. - Tempe AZ

International Classification:

H03M 112

US Classification:

341155, 323283, 327538

Abstract:

Currents flowing in the various channels within a voltage regulator module (VRM) are suitably converted to digital equivalents that can be processed to control each module in a modular power supply. Functions that may be digitally implemented include current balancing between channels, current sharing between various modules in a power supply, and/or the like. By monitoring the current provided on each channel within a module, for example, a controller can determine an average current for the channels, which in turn can be used to identify and compensate for over- or under-production in any particular channel. Active voltage positioning techniques and overload protection may also be implemented using digital techniques.

US Patent:

6965502, Nov 15, 2005

Filed:

Mar 22, 2002

Appl. No.:

10/103980

Inventors:

Thomas P. Duffy - Chandler AZ, US
Ryan Goodfellow - Mesa AZ, US
Malay Trivedi - Phoenix AZ, US
Kevin Mori - Chandler AZ, US
Benjamim Tang - Hawthorne CA, US

Assignee:

Primarion, Inc. - Phoenix AZ

International Classification:

H02H009/00

US Classification:

361 18, 361111

Abstract:

The present invention provides a power regulation system and method with high speed signal settling capabilities for providing rapid active transient response to a microelectronic device. An active transient response system includes a power supply configured to receive external and/or internal signals indicating the occurrence of transient load conditions and to respond to the transient load conditions based on one or more of these signals. The system may further include a transient suppressor configured for early detection of transients, assisting in transient suppression, and early signaling of transient activity to the power supply. The system provides rapid recovery to steady state operation from the active transient response mode by using a digital compensator to quickly modifying the duty cycle and provide a voltage offset proportional to the transient microprocessor load step. Recovery is further improved by current rephasing techniques.

US Patent:

7002249, Feb 21, 2006

Filed:

Nov 12, 2002

Appl. No.:

10/294423

Inventors:

Thomas P. Duffy - Chandler AZ, US
John Ryan Goodfellow - Mesa AZ, US
Robert T. Carroll - Andover MA, US
Kevin J. Cote - Ocotillo AZ, US
Sampath K. V. Karikalan - Phoenix AZ, US
Suresh Golwalkar - Phoenix AZ, US

Assignee:

Primarion, Inc. - Phoenix AZ

International Classification:

H01L 23/495
H01L 27/02
H01L 23/48

US Classification:

257728, 257532, 257676, 257916, 257724, 257659, 257698, 257696, 257784, 257666, 257668, 257692, 257691, 257786, 174 524, 361813

Abstract:

A semiconductor device package is disclosed which includes inter-digitated input and output bond wires configured to increase the negative mutual inductive coupling between the wires, thus reducing the overall parasitic inductance of the device. In one embodiment, the microelectronic component includes a semiconductor device coupled to a substrate, such as a lead frame, a first set of bond wires connected to the semiconductor device for providing current flow into the semiconductor device, and a second set of bond wires that are in a current loop with the first set of bond wires and are connected to the semiconductor device for providing current flow out of the semiconductor device, wherein the first and second set of bond wires are configured in an inter-digitated pattern to increase the magnitude of mutual inductive coupling between the first and second set of bond wires. In one embodiment, the semiconductor device comprises a single semiconductor chip and the lead frame comprises a Quad Flat No-Lead (QFN) lead frame. Other embodiments include multiple chips and/or multiple lead frames.

US Patent:

8300374, Oct 30, 2012

Filed:

Nov 12, 2008

Appl. No.:

12/269402

Inventors:

Thomas William Ciccone - Tempe AZ, US
Thomas Duffy - Maricopa AZ, US
Bryan McCoy - Chandler AZ, US
Timothy Kaske - Phoenix AZ, US
John Ciccone - Scottsdale AZ, US

Assignee:

Semiconductor Components Industries, LLC - Phoenix AZ

International Classification:

H02H 3/08
H02H 9/02
H02H 9/08

US Classification:

361 931, 361 939

Abstract:

A semiconductor component that includes a current limit circuit and a method for limiting current in the semiconductor component. An input/output pin is connected to the gate of a transistor and a control resistor is connected between the gate of the transistor and its source. One terminal of the control resistor is connected to the input/output pin and the other terminal is connected to another input/output pin. A current source is connected to the input/output pin. A reference voltage is generated between the two input/output pins and compared with a drain-source voltage that is between one of the two input/output pins and another input/output pin. A control voltage is set in accordance with the comparison. The control voltage then controls the voltage on another of the pins that is not common to the reference voltage and to the drain-source voltage.

US Patent:

20020047768, Apr 25, 2002

Filed:

Oct 10, 2001

Appl. No.:

09/975026

Inventors:

Thomas Duffy - Chandler AZ, US

International Classification:

H01F021/02
H01F027/28
H01F027/24

US Classification:

336/145000, 336/182000, 336/219000, 029/602100, 029/607000, 029/852000

Abstract:

An improved magnetic structure suitable for electronic applications is disclosed. The magnetic structure may be formed on or within a substrate such as a printed circuit board by forming a layer of magnetic material, pattering the layer of magnetic material, and etching the layer to form the magnetic structure. Various insulating layers and/or conductive layers may then be formed over the magnetic structures as part of the substrate. Inductors suitable for use in power supplies may be formed using the magnetic structures of the present invention.

US Patent:

20120101342, Apr 26, 2012

Filed:

Oct 19, 2011

Appl. No.:

13/276321

Inventors:

Thomas P. Duffy - Maricopa AZ, US
Gerald T. Harder - Chandler AZ, US
Kevin Mori - Chandler AZ, US

International Classification:

A61B 1/06

US Classification:

600249

Abstract:

A pediatric tissue illuminator includes a semi-rigid lighting head removably connected to a powered base unit for illuminating an infant's tissues while stabilizing a limb for venipuncture. The lighting head includes a series of LEDs and is placed behind an infant's arm, thereby directing light therethrough for enhanced viewing. A printed circuit board in the lighting head routes electrical conductors to the LEDs. A translucent soft covering is disposed between the printed circuit board and the infant's body. The base unit includes a control circuit for varying the application of electrical power to the lighting head via an electrical cable. The arm board/light head is inexpensive enough to be disposable. Alternatively, a re-useable light head may be used with disposable semi-rigid housings.