Thomas R Mills

US Patent:

41557840, May 22, 1979

Filed:

Apr 8, 1977

Appl. No.:

5/785881

Inventors:

Thomas G. Mills - Carson CA
Wallace T. Anderson - Huntington Beach CA
Arthur D. Herbig - San Jose CA

Assignee:

TRW Inc. - Redondo Beach CA

International Classification:

H01L 21205
H01L 21465
H01L 2920

US Classification:

148175

Abstract:

A process for epitaxially forming a layer of gallium arsenide having a first conductivity on a substrate of gallium arsenide having a second conductivity in an enclosure having an inner liner comprised of a silicon compound, comprising decomposing arsine to form arsenic; chemically reacting a first quantity of hydrogen chloride and gallium to form gallium chloride, the gallium chloride reacting with the arsenic to form gallium arsenide on the substrate, a portion of the first quantity of hydrogen chloride remaining unreacted and tending to cause silicon contaminants from the liner to be deposited on the substrate; and providing a second quantity of hydrogen chloride into the enclosure which serves to initially etch, and hence clean, the outer surface of the substrate prior to the formation of gallium arsenide thereon, and simultaneously tends to inhibit the formation of silicon contaminants on the substrate, the second quantity and the first quantity having a preselected ratio such that the growth rate of the gallium arsenide layer on the substrate is greater than the etching rate of gallium arsenide due to the second quantity of hydrogen.

US Patent:

44267657, Jan 24, 1984

Filed:

Aug 24, 1981

Appl. No.:

6/295924

Inventors:

Iradj Shahriary - Santa Monica CA
Thomas G. Mills - Carson CA

Assignee:

TRW Inc. - Redondo Beach CA

International Classification:

H01L 21283
H01L 21225

US Classification:

29571

Abstract:

A process and related product in which ohmic contacts are formed in semiconductor devices employing compound substrates such as gallium arsenide. In the disclosed embodiment, a germanium layer (18) is deposited in those areas (14) in which ohmic contact is required and is subsequently diffused into a layer 20 of the substrate during a conventional annealing step required to relieve damage caused to the substrate during a prior conventional ion implantation step. As a result of the diffusion of the germanium, good ohmic contact can be made by deposition of a conductive metal 26, such as gold. Thus, a common metalization step can be employed to form both the ohmic contact regions and rectifying contact regions used as gates in field effect transistors.

US Patent:

43800203, Apr 12, 1983

Filed:

Jan 21, 1980

Appl. No.:

6/114031

Inventors:

Lloyd T. Yuan - Rancho Palos Verdes CA
Yu-Wen Chang - Rancho Palos Verdes CA
Thomas G. Mills - Carson CA

Assignee:

TRW Inc. - Redondo Beach CA

International Classification:

H01L 2726

US Classification:

357 3

Abstract:

An active semiconductor device, such as a Gunn effect device, capable of operation at extremely high frequencies, fabricated in situ on a substrate that also serves as a dielectric waveguide to propagate energy from the device. In the embodiment disclosed, a Gunn effect diode is formed on a substrate of gallium arsenide (GaAs), together with a cavity region and a metalized heat sink layer permitting operation at relatively high power levels. A bias current is applied through a conductive strip and then through the cavity region to the diode, and a quarter-wave choke is provided in the conductive strip to prevent transmission of radio-frequency energy back along the strip.