L3Harris Technologies
Senior Scientist
Harris Corporation Gcs
Senior Scientist
Harris Corporation May 2004 - Apr 2013
Senior Analyst
Itt Aerospace/Communications Systems Nov 2001 - May 2004
Senior Systems Engineer
Fujant Sep 2000 - Nov 2001
Senior Signal Processing Engineer
Education:
Princeton University 1982 - 1986
Masters, Master of Arts
Villanova University 1978 - 1979
Masters, Master of Electrical Engineering, Engineering
Penn State University 1970 - 1974
Bachelors, Physics
Skills:
Signal Processing Radar Simulations Wireless Digital Signal Processing Systems Engineering Software Defined Radio Algorithm Development Matlab R&D Pattern Recognition Phy Defense Integration Dod Computer Security Government Contracting Information Assurance Military Microsoft Excel Security Clearance Aerospace Proposal Writing Mathworks Analysis Business Analysis
Maria Laprade - Palm Bay FL, US Matthew C. Cobb - West Melbourne FL, US Timothy F. Dyson - Melbourne FL, US
Assignee:
Harris Corporation - Melbourne FL
International Classification:
H03M 13/00
US Classification:
714755, 714758
Abstract:
A serial concatenated convolutional code (SCCC) decoder is provided. The SCCC decoder is comprised of an input buffer memory (), one or more processing loop modules (), and an output buffer memory (). Each processing loop module is comprised of a permutation module (), an inner decoder module (), a depermutation module (), and an outer decoder module (). The inner decoder module is subdivided into two (2) or more inner decoding engines (-) configured for concurrently performing a decoding operation based on an inner convolutional code. The outer decoder module is subdivided into two (2) or more outer decoding engines (-) configured for concurrently performing a decoding operation based on an outer convolutional code. The inner convolutional code and the outer convolutional code are designed in accordance with a maximum aposteriori probability based decoding algorithm.
Parallel Arrangement Of Serial Concatenated Convolutional Code Decoders With Optimized Organization Of Data For Efficient Use Of Memory Resources
Maria Laprade - Palm Bay FL, US Matthew C. Cobb - W. Melbourne FL, US Timothy F. Dyson - Melbourne FL, US
Assignee:
Harris Corporation - Melbourne FL
International Classification:
H03M 13/00
US Classification:
714752, 714758, 714755
Abstract:
A decoding system () is provided. The decoding system is comprised of two or more serial concatenated convolutional code (SCCC) decoders (-) operating in parallel. The SCCC decoders are configured to concurrently decode codeblocks which have been encoded using a convolutational code. The decoding system is also comprised of a single common address generator () and data store (). The address generator is responsive to requests for data needed by two or more of the SCCC decoders for permutation and depermutation. The data store is comprised of two or more memory blocks (-). The SCCC decoders concurrently generate requests for two or more different data types. Selected ones of the different data types are exclusively stored in different ones of the memory blocks. Selected ones of the different data types are comprised of data which is requested at the same time by a particular one of the SCCC decoders.
Maria Laprade - Palm Bay FL, US Matthew C. Cobb - W. Melbourne FL, US Timothy F. Dyson - Melbourne FL, US
Assignee:
Harris Corporation - Melbourne FL
International Classification:
H03M 13/00
US Classification:
714755, 714784, 714786
Abstract:
A serial concatenated convolutional code (SCCC) decoder is provided. The SCCC decoder includes an input buffer memory one or more processing loop modules, and an output buffer memory. Each processing loop module includes a permutation module, inner decoding engines, a depermutation module, and outer decoding engines. The depermutation module includes a concatenating device and two or more depermutation buffer memories. The concatenating device is configured for writing a codeword segment containing a plurality of soft-decision bits to each of the depermutation buffer memories in a single write operation. The permutation module also includes a concatenating device and two or more permutation buffer memories. The concatenating device is configured for writing a codeword segment containing a plurality of soft-decision bits to each of the depermutation buffer memories in a single write operation.
High Dimension Signaling Using Orthogonal Waveform Division Multiplex
A communications system () includes a segmenter () for dividing a plurality of bits into a first segment and a second segment and a symbol mapper () for generating a plurality of symbols based on the first segment. The system also includes a co-set selector () for selecting a plurality of co-set waveforms from a plurality of orthogonal waveforms based on a co-set address defined by the second segment, a number (K) of the plurality of co-set waveforms being less than a number (N) of the plurality of orthogonal waveforms. The system further includes a modulator () for modulating the plurality of symbols based on the plurality of co-set waveforms.
Maria Laprade - Palm Bay FL, US Matthew C. Cobb - W. Melbourne FL, US Timothy F. Dyson - Melbourne FL, US
Assignee:
Harris Corporation - Melbourne FL
International Classification:
H03M 13/03
US Classification:
375341, 375262, 714794, 714796
Abstract:
A method is provided for performing a MAP probability decoding of a sequence R(n) including N bits of encoded data. The method includes the steps of: (a) generating a sequence rof sot-values by processing the sequence R(n); (b) performing a forward recursion by computing alpha values αutilizing the soft-decision values; (c) performing a backward recursion by computing beta values βutilizing the soft-decision values; and (d) performing an extrinsic computation by computing probability values p′. The alpha values αare relative log-likelihoods of an encoding process arriving at various states. The beta values βare relative log-likelihoods of the encoding process arriving at various states. The probability values p′represent a set of probabilities indicating that each data bit of an input sequence dhad a value equal to zero or one. The sequence R(n) represents an encoded form of the input sequence d.
Serially Concatenated Convolutional Code Decoder With A Constrained Permutation Table
Maria Laprade - Palm Bay FL, US Matthew C. Cobb - W. Melbourne FL, US Timothy F. Dyson - Melbourne FL, US
Assignee:
Harris Corporation - Melbourne FL
International Classification:
H03M 13/00 H03M 13/03
US Classification:
714755, 714786
Abstract:
A Serially Concatenated Convolutional Code (SCCC) decoding system includes an outer decoder module (), permutation module (), and data store (). The outer decoder module is configured to generate a first sequence of soft-decision bits x[n] for n=0, 1, 2,. . . , N−1. The permutation module is configured to permute the first sequence of soft-decision bits x[n] to generate a second sequence of soft-decision bits y[n]. The first sequence of soft-decision bits x[n] is generated by the outer decoder module in accordance with a mapping v[n]. The second sequence of soft-decision bits y[n] is generated for communication to an inner decoder module (). The data store contains a mapping v[n]. The mapping v[n] satisfies a mathematical equation v[k+m(N/M)] modulo (N/M)=v[k] modulo (N/M) for m=0,. . . , M−1 and k=0,. . . , (N/M−1).
High Density Fm Subcarrier Modulation With Standardized Network Layer
Timothy F. Dyson - San Clemente CA Steven J. Davis - Hermosa Beach CA Gordon E. Kaiser - San Juan Capistrano CA
Assignee:
Cue Corporation - Irvine CA
International Classification:
H04L 2302 H04L 512
US Classification:
375265
Abstract:
The present invention provides a system for multiplexing DARC encoded source channels using an FM subcarrier, wherein the system includes a plurality of channels. Each channel within the plurality of channels is coupled to its own DARC encoded source channel. Within each channel of the system, the DARC encoded source channel is block encoded to produce parity and data bytes. The parity bytes and data bytes are separately trellis code modulated to form a first and second set of complex signals, respectively. A first digital modulator modulates a first set of orthogonal signals using the first set of complex signals. A second digital modulates a second set of orthogonal signals using the second set of complex signals.
Systems And Methods For Space-Based Geolocation Of Vessels Using Maritime Signals Transmitted Therefrom
- Melbourne FL, US Timothy F. Dyson - Melbourne FL, US Jason Plew - Malabar FL, US Joshua P. Bruckmeyer - West Melbourne FL, US Charles Zahm - Indialantic FL, US
International Classification:
G01S 19/46
Abstract:
Systems () and methods () for space-based geolocation. The methods involve receiving by at least two first satellites a maritime signal transmitted from a vessel on or near Earth. The first satellites are deployed in space so as to have overlapping coverage areas. The maritime signal (received at the at least two first satellites) is then used to determine a geographic location of the vessel on Earth using at least one of a Time Difference of Arrival (“TDOA”) and a Frequency Difference of Arrival (“FDOA”).