Timothy Wayne Ellis

US Patent:

6352743, Mar 5, 2002

Filed:

Jun 11, 1999

Appl. No.:

09/330906

Inventors:

Timothy W. Ellis - Doylestown PA
Nikhil Murdeshwar - Abington PA
Mark A. Eshelman - Lansdale PA

Assignee:

Kulicke Soffa Investments, Inc. - Wilmington DE

International Classification:

B05D 512

US Classification:

4271262, 427124, 427 99, 42725519, 42725539, 427255393, 438618, 438587, 438976

Abstract:

Methods of protecting from atmospheric contaminants, or removing atmospheric contaminants from, the bonding surfaces of copper semiconductor bond pads by coating a bond pad with a layer of a ceramic material having a thickness that is suitable for soldering without fluxing and that is sufficiently frangible during ball or wedge wire bonding to obtain metal-to-metal contact between the bonding surfaces and the wires bonded thereto. Coated semiconductor wafers are also disclosed.

US Patent:

6413576, Jul 2, 2002

Filed:

Oct 5, 1999

Appl. No.:

09/412542

Inventors:

Timothy W. Ellis - Doylestown PA
Nikhil Murdeshwar - Abington PA
Mark A. Eshelman - Lansdale PA
Christian Rheault - Willow Grove PA

Assignee:

Kulicke Soffa Investments, Inc. - Wilmington DE

International Classification:

B05D 512

US Classification:

427 96, 427 99, 427118, 427124, 4271262, 29832, 2041921, 438612

Abstract:

Methods for protecting the surface of an uninsulated portion of a copper circuit from environmental contamination detrimental to joining the surface to another metal surface, said method comprising the step of coating the surface with a layer of a ceramic material having a thickness that is suitable for soldering without fluxing and that is sufficiently frangible when the surfaces are being joined to obtain metal-to-metal contact between the surfaces. Coated electronic packages including semiconductor wafers are also disclosed.

US Patent:

6534877, Mar 18, 2003

Filed:

Jan 18, 2002

Appl. No.:

10/051482

Inventors:

Timothy W. Ellis - Doylestown PA
Nikhil Murdeshwar - Abington PA
Mark A. Eshelman - Lansdale PA

Assignee:

Kulicke Soffa Investments, Inc. - Wilmington DE

International Classification:

H01L 2348

US Classification:

257779, 257734, 257762, 257781

Abstract:

Methods of protecting from atmospheric contaminants, or removing atmospheric contaminants from, the bonding surfaces of copper semiconductor bond pads by coating a bond pad with a layer of a ceramic material having a thickness that is suitable for soldering without fluxing and that is sufficiently frangible during ball or wedge wire bonding to obtain metal-to-metal contact between the bonding surfaces and the wires bonded thereto. Coated semiconductor wafers are also disclosed.

US Patent:

6885104, Apr 26, 2005

Filed:

May 22, 2002

Appl. No.:

10/153451

Inventors:

Timothy W. Ellis - Doylestown PA, US
Nikhil Murdeshwar - Abington PA, US
Mark A. Eshelman - Lansdale PA, US
Christian Rheault - Willow Grove PA, US

Assignee:

Kulicke & Soffa Investments, Inc. - DE

International Classification:

H01L029/40
H01L021/94
B23K020/12
B23K031/02
B23K001/00

US Classification:

257762, 257778, 257784, 257785, 438612, 438613, 228 15, 228120, 228127, 22826231

Abstract:

Electronic packages with uninsulated portions of copper circuits protected with coating layers having thicknesses that are suitable for soldering without fluxing and are sufficiently frangible when being joined to another metal surface to obtain metal-to-metal contact between the surfaces.

US Patent:

7199475, Apr 3, 2007

Filed:

Mar 21, 2005

Appl. No.:

11/084985

Inventors:

Timothy W. Ellis - Doylestown PA, US
Nikhil Murdeshwar - Abington PA, US
Mark A. Eshelman - Lansdale PA, US
Christian Rheault - Willow Grove PA, US

Assignee:

Kulicke and Soffa Industries, Inc. - Fort Washington PA

International Classification:

H01L 23/52

US Classification:

257762, 257779, 257734

Abstract:

Electronic packages with uninsulated portions of copper circuits protected with coating layers having thicknesses that are suitable for soldering without fluxing and are sufficiently frangible when being joined to another metal surface to obtain metal-to-metal contact between the surfaces.

US Patent:

20020168538, Nov 14, 2002

Filed:

Apr 23, 2002

Appl. No.:

10/128072

Inventors:

Timothy Ellis - Doylestown PA, US

International Classification:

B22F003/26
H01L023/48

US Classification:

428/567000, 428/576000, 257/784000

Abstract:

A metal alloy composite comprising a phase of a highly-conductive base metal in the from of a matrix and a phase of another metal positioned within the matrix, the base metal being present in a major amount and the other metal being present in a minor amount, the metal alloy composite being capable of being formed into a very thin wire for use in a semiconductor application which includes a terminal assembly comprising an electrically conductive terminal in conductive contact with a conductive member and another electrically conductive terminal in conductive contact with a semiconductor, said terminals being joined by said alloy composite wire, examples of the base metal being gold, copper, and aluminum.

US Patent:

20040012937, Jan 22, 2004

Filed:

Jul 18, 2002

Appl. No.:

10/199484

Inventors:

David DeGrappo - Doylestown PA, US
Richard Dow - Philadelphia PA, US
Timothy Ellis - Doylestown PA, US

Assignee:

KULICKE & SOFFA INVESTMENTS, INC. - Wilmington DE

International Classification:

H05K007/02

US Classification:

361/782000

Abstract:

A process for manufacturing a Printed Circuit Board (PCB) substrate with passive electrical components (e.g., capacitors, inductors and/or resistors) includes weaving a plurality of dielectric strands (e.g., fiberglass yarns) and at least one electrically conductive strand (e.g., a copper wire) to form a woven fabric. The woven fabric is impregnated with a dielectric resin material to form an impregnated fabric and, thereafter, the impregnated fabric is cured to form a cured fabric. The cured fabric's upper and lower surfaces are then planed. The planing of the upper and lower surface segments the electrically conductive strands and forms a PCB substrate with a passive electrical component (e.g., a capacitor and/or inductor) therein. The passive electrical component(s) includes electrically isolated conductive strand segments separated by at least one of the dielectric resin material and the dielectric strands. A PCB substrate with passive electrical components formed therein includes a planarized woven fabric with a cured dielectric resin material impregnated therein. The planarized woven fabric includes a planed upper surface, a planed lower surface and a plurality of integrally formed electrically conductive strand segments (e.g., copper wire segments) configured as electrically conductive portions of a passive electrical component. The cured dielectric resin material is disposed between the integrally formed conductive strand segments.

US Patent:

20050055933, Mar 17, 2005

Filed:

Sep 3, 2003

Appl. No.:

10/654081

Inventors:

Richard Dow - Philadelphia PA, US
Timothy Ellis - Doylestown PA, US

International Classification:

E04B002/00

US Classification:

052506010

Abstract:

A triaxial woven structure is provided including a first rigid member having a serpentine shape comprising a first plurality of peaks and a first plurality of troughs. A second rigid member has a serpentine shape comprising a second plurality of peaks and a second plurality of troughs. A peak of the first rigid member is disposed within a trough of the second rigid member. A third rigid member has a substantially linear shape and is disposed within a trough of the first rigid member and a peak of the second rigid member.