Timothy Daniel Jackson

US Patent:

6501176, Dec 31, 2002

Filed:

Aug 14, 2001

Appl. No.:

09/929455

Inventors:

Timothy L. Jackson - Eagle ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 2348

US Classification:

257738, 257783, 257785, 257690, 438 66, 438 82

Abstract:

A package for connecting an integrated circuit to a printed circuit board. The package includes an interconnect having a deflectable cantilever and a solder bump. When the integrated circuit is affixed to the interconnect, the solder bump deflects the cantilever. When the solder bump is heated such that the solder reflows, the cantilever springs toward its non-deflected position and is at least partially absorbed by the reflowing solder.

US Patent:

6503777, Jan 7, 2003

Filed:

Aug 14, 2001

Appl. No.:

09/929616

Inventors:

Timothy L. Jackson - Eagle ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 2144

US Classification:

438106, 438108, 438121

Abstract:

A package for connecting an integrated circuit to a printed circuit board. The package includes an interconnect having a deflectable cantilever and a solder bump. When the integrated circuit is affixed to the interconnect, the solder bump deflects the cantilever. When the solder bump is heated such that the solder reflows, the cantilever springs toward its non-deflected position and is at least partially absorbed by the reflowing solder.

US Patent:

6506681, Jan 14, 2003

Filed:

Dec 6, 2000

Appl. No.:

09/731360

Inventors:

Ford B. Grigg - Meridian ID
Timothy L. Jackson - Eagle ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 2100

US Classification:

438692, 216 38, 216 88, 438108, 438113, 438458, 438459, 438460, 438690, 438745

Abstract:

Methods for thinning a bumped semiconductor wafer, as well as methods for producing flip-chips of very thin profiles, are disclosed. According to the methods of the present invention, a mold compound is interspersed between conductive bumps on the active face of a wafer to provide support and protection for the wafer structure both during and after a process of removing the wafers inactive backside silicon surface. The mold compound also serves to preserve the integrity of the conductively bumped aspects of the wafer during subsequent processing and may, after the wafer is diced, act as all or part of an underfill material for flip-chip applications.

US Patent:

6630738, Oct 7, 2003

Filed:

Dec 18, 2002

Appl. No.:

10/324626

Inventors:

Timothy L. Jackson - Eagle ID

Assignee:

Micron Technology, INC - Boise ID

International Classification:

H01L 2940

US Classification:

257738, 257774, 257775, 257783, 324762

Abstract:

A package for connecting an integrated circuit to a printed circuit board. The package includes an interconnect having a deflectable cantilever and a solder bump. When the integrated circuit is affixed to the interconnect, the solder bump deflects the cantilever. When the solder bump is heated such that the solder reflows, the cantilever springs toward its non-deflected position and is at least partially absorbed by the reflowing solder.

US Patent:

6664131, Dec 16, 2003

Filed:

Dec 18, 2002

Appl. No.:

10/324627

Inventors:

Timothy L. Jackson - Eagle ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 2144

US Classification:

438108, 438117, 438118

Abstract:

A package for connecting an integrated circuit to a printed circuit board. The package includes an interconnect having a deflectable cantilever and a solder bump. When the integrated circuit is affixed to the interconnect, the solder bump deflects the cantilever. When the solder bump is heated such that the solder reflows, the cantilever springs toward its non-deflected position and is at least partially absorbed by the reflowing solder.

US Patent:

6682955, Jan 27, 2004

Filed:

May 8, 2002

Appl. No.:

10/141447

Inventors:

Chad A. Cobbley - Boise ID
Timothy L. Jackson - Eagle ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 2144

US Classification:

438118, 361735

Abstract:

A technique for forming die stacks. Specifically, a stacking tip is provided to facilitate the stacking of die in a desired configuration. A first die is picked up by the stacking tip. The first die is coated with an adhesive on the underside of the die. The first die is brought in contact with a second die via the stacking tip. The second die is coupled to the first die via the adhesive on the underside of the first die. The second die is coated with an adhesive coating on the underside of the die. The second die is then brought in contact with a third die via the stacking tip. The third die is coupled to the second die via the adhesive on the underside of the second die, and so forth. Die stacks are formed without being coupled to a substrate. The die stacks may be functionally and/or environmentally tested before attaching the die stack to a substrate.

US Patent:

6800930, Oct 5, 2004

Filed:

Jul 31, 2002

Appl. No.:

10/209823

Inventors:

Timothy L. Jackson - Eagle ID
Tim E. Murphy - Boise ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 23053

US Classification:

257700, 257737, 257758, 257784

Abstract:

An apparatus and method of rerouting redistribution lines from an active surface of a semiconductor substrate to a back surface thereof and assembling and packaging individual and multiple semiconductor dice with such rerouted redistribution lines formed thereon. The semiconductor substrate includes one or more vias having conductive material formed therein and witch extend from an active surface to a back surface of the semiconductor substrate. The redistrobution patterns are patterned on the back surface of the semiconductor substrate, extending from the conductive material in the vias to predetermined locations on the back surface of the semiconductor substrate that correspond with an interconnect pattern of another substrate for interconnection thereto.

US Patent:

6905946, Jun 14, 2005

Filed:

Aug 27, 2002

Appl. No.:

10/229837

Inventors:

Ford B. Grigg - Meridian ID, US
Timothy L. Jackson - Eagle ID, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L021/30

US Classification:

438459, 438455, 438690

Abstract:

Methods for thinning a bumped semiconductor wafer, as well as methods for producing flip-chips of very thin profiles, are disclosed. According to the methods of the present invention, a mold compound is interspersed between conductive bumps on the active face of a wafer to provide support and protection for the wafer structure both during and after a process of removing the wafer's inactive back side silicon surface. The mold compound also serves to preserve the integrity of the conductively bumped aspects of the wafer during subsequent processing and may, after the wafer is diced, act as all or part of an underfill material for flip-chip applications.