Tony C Yeung

US Patent:

7053725, May 30, 2006

Filed:

Oct 25, 2004

Appl. No.:

10/904128

Inventors:

Ke Wu - San Jose CA, US
Tony Yeung - Milpitas CA, US
Michael Y. Zhang - Palo Alto CA, US

Assignee:

Pericom Semiconductor Corp. - San Jose CA

International Classification:

H03B 5/32

US Classification:

331156, 311116 R

Abstract:

A frequency-multiplying circuit generates a multiple of the fundamental frequency of a crystal that oscillates. A first differential multiplier is coupled to the crystal nodes and generates a frequency-doubled output. The frequency-doubled output is applied to an op amp that buffers the output and compares it to a reference to generate a pair of differential buffered signals. The differential buffered signals are applied to a second differential multiplier that generates a final quadrupled-frequency output. The differential multipliers can each have a pair of differential transistors that receive signals that oscillate out-of-phase to each other by 180 degrees. The drains of the differential transistors connect together at a summing node to sum the transistor currents, producing the frequency-doubled output. A crystal driver circuit using cross-coupled and direct-coupled transistors may also be attached to the crystal nodes.

US Patent:

7332977, Feb 19, 2008

Filed:

Dec 21, 2005

Appl. No.:

11/306262

Inventors:

Boris Drakhlis - Mountain View CA, US
Wing Faat Liu - San Jose CA, US
Craig M. Taylor - Pleasanton CA, US
Tony Yeung - Milpitas CA, US

Assignee:

Pericom Semiconductor Corp. - San Jose CA

International Classification:

H03B 27/00

US Classification:

331 46, 331 49, 331 53, 331158, 331116 R, 331116 FE, 331 74

Abstract:

A crystal oscillator operates at the third overtone of the crystal's fundamental frequency. A value of a shunt resistor between the two phase-shift leg nodes is chosen so that the absolute value of the product gm×(Xc)×(Xc) is greater than the effective reactance of the crystal, where gm is the gain of the amplifier attached to the phase-shift legs, and Xc and Xc are the effective capacitive reactances of phase-shift legs at nodes X and X. The third overtone is doubled by a multiplier and the final output filtered to remove the third overtone and select a frequency six times the fundamental frequency. A pair of Colpitts or Pierce amplifier half circuits is attached to the phase-shift leg nodes. The leg nodes can be capacitively isolated from Pierce-amplifier circuit nodes to improve start-up. Frequency doubling can be performed by summing currents from the two oscillator half circuits.

US Patent:

7915923, Mar 29, 2011

Filed:

Mar 9, 2009

Appl. No.:

12/400708

Inventors:

Tony Yeung - Milpitas CA, US
Michael Yimin Zhang - Palo Alto CA, US

Assignee:

Pericom Semiconductor - San Jose CA

International Classification:

H03K 19/0175

US Classification:

326 82, 326 86, 375211, 375229, 710106

Abstract:

Method and apparatus for a communication system () using a driver block () are described. The driver block includes memory having programmable non-volatile memory cells for storing configuration settings associated with operation of the driver block (). The driver block () is programmable for a selected interface protocol for operation in an adaptive equalization mode to obtain an adaptive equalization value. The adaptive equalization value is stored as a fixed equalization value for operating the driver block in a fixed equalization mode. The driver block may be used as a serial link driver interface.

US Patent:

8212587, Jul 3, 2012

Filed:

Oct 23, 2008

Appl. No.:

12/256624

Inventors:

Tony Yeung - Milpitas CA, US
Michael Y. Zhang - Palo Alto CA, US

Assignee:

Pericom Semiconductor Corp. - San Jose CA

International Classification:

H03K 19/0175

US Classification:

326 82, 326 86, 375211, 375229, 710106

Abstract:

A redriver chip is inserted between a transmitter chip and a receiver chip and re-drives differential signals from the transmitter chip to the receiver chip. The redriver chip has switched output termination that switches to a high value to detect far-end termination at the receiver chip, and to a low value for signaling. An output detector detects when the receiver chip has termination to ground and enables switched input termination to provide termination to ground on the lines back to the transmitter chip so that the far-end termination on the receiver chip is mirrored back to the transmitter chip, hiding the redriver chip. An input signal detector detects when the transmitter chip begins signaling and enables an equalizer, limiter, pre-driver, and output stage to re-drive the signals to the receiver chip. The input signal detector also causes the switched output termination to switch to the low value termination for signaling.

US Patent:

8362813, Jan 29, 2013

Filed:

Mar 24, 2011

Appl. No.:

13/071448

Inventors:

Tony Yeung - Milpitas CA, US
Michael Y. Zhang - Palo Alto CA, US

Assignee:

Pericom Semiconductor Corp. - San Jose CA

International Classification:

H03B 1/00

US Classification:

327110, 327108, 327304, 326 88

Abstract:

A re-driver circuit has pre-driver, intermediate, and output stages. Pre-emphasis on the output is generated by the intermediate stage and injected into an output stage. The intermediate stage is a frequency-tuned amplifier that has an inductive-capacitive L-C tank circuit that is tuned to a desired frequency of the output. The intermediate stage does not directly drive the output stage. Instead, an on-chip coupling transformer couples the L-C tank circuit to the output stage. The coupling transformer has a first inductor that is part of the L-C tank circuit in the intermediate stage, and a second inductor that is part of the output stage. Mutual inductance between the first inductor and the second inductor inductively couple a pre-emphasis voltage onto the output. The magnitude of the pre-emphasis can be changed by adjusting current in the intermediate stage.

US Patent:

8400183, Mar 19, 2013

Filed:

Jan 18, 2011

Appl. No.:

13/008328

Inventors:

Tony Yeung - Milpitas CA, US
Michael Yimin Zhang - Palo Alto CA, US

Assignee:

Pericom Semiconductor Corporation - San Jose CA

International Classification:

H03K 19/0175

US Classification:

326 63, 326 83, 327333

Abstract:

An embodiment of a method for powering a low-power device using a power supply designed for a high-power device is described. In such an embodiment, an input voltage is provided to a voltage converter at a first voltage level. The input voltage is periodically electrically coupled to and decoupled from the voltage converter during operation of the low-power device. An output voltage is output from the voltage converter at a second voltage level to power the low-power device. The output voltage is provided during both the input voltage being electrically coupled to and decoupled from the voltage converter, and the second voltage level is substantially less than the first voltage level.

US Patent:

8610463, Dec 17, 2013

Filed:

Jun 1, 2012

Appl. No.:

13/487100

Inventors:

Tony Yeung - Milpitas CA, US
Michael Y. Zhang - Palo Alto CA, US

Assignee:

Pericom Semiconductor Corp. - San Jose CA

International Classification:

H03K 19/0175

US Classification:

326 82, 326 86, 375211, 375229, 710106

Abstract:

A redriver chip is inserted between a transmitter chip and a receiver chip and re-drives differential signals from the transmitter chip to the receiver chip. The redriver chip has switched output termination that switches to a high value to detect far-end termination at the receiver chip, and to a low value for signaling. An output detector detects when the receiver chip has termination to ground and enables switched input termination to provide termination to ground on the lines back to the transmitter chip so that the far-end termination on the receiver chip is mirrored back to the transmitter chip, hiding the redriver chip. An input signal detector detects when the transmitter chip begins signaling and enables an equalizer, limiter, pre-driver, and output stage to re-drive the signals to the receiver chip. The input signal detector also causes the switched output termination to switch to the low value termination for signaling.

US Patent:

20130159759, Jun 20, 2013

Filed:

Dec 14, 2011

Appl. No.:

13/326020

Inventors:

Tony Yeung - Milpitas CA, US
Michael Y. Zhang - Palo Alto CA, US

International Classification:

G06F 1/12
H04L 27/00

US Classification:

713401, 375316

Abstract:

Embodiments of an apparatus for signal conditioning, a serial data interface, and a method for a programmable delay filter are disclosed. In an embodiment of an apparatus for signal conditioning, a wave shaping circuit has a precursor signal, a post cursor signal, and a main signal combined to provide an output signal. The precursor signal, the post cursor signal, and the main signal are provided for combination independently of a clock signal. The main signal is delayed relative to the precursor signal, and the post cursor signal is delayed relative to the main signal.